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Kconfig 48.1 KB
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menu "ARM architecture"
	depends on ARM

config SYS_ARCH
	default "arm"

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config ARM64
	bool
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	select PHYS_64BIT
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	select SYS_CACHE_SHIFT_6
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if ARM64
config POSITION_INDEPENDENT
	bool "Generate position-independent pre-relocation code"
	help
	  U-Boot expects to be linked to a specific hard-coded address, and to
	  be loaded to and run from that address. This option lifts that
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	  restriction, thus allowing the code to be loaded to and executed from
	  almost any 4K aligned address. This logic relies on the relocation
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	  information that is embedded in the binary to support U-Boot
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	  relocating itself to the top-of-RAM later during execution.
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config INIT_SP_RELATIVE
	bool "Specify the early stack pointer relative to the .bss section"
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	default n if ARCH_QEMU
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	default y if POSITION_INDEPENDENT
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	help
	  U-Boot typically uses a hard-coded value for the stack pointer
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	  before relocation. Enable this option to instead calculate the
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	  initial SP at run-time. This is useful to avoid hard-coding addresses
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	  into U-Boot, so that it can be loaded and executed at arbitrary
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	  addresses and thus avoid using arbitrary addresses at runtime.

	  If this option is enabled, the early stack pointer is set to
	  &_bss_start with a offset value added. The offset is specified by
	  SYS_INIT_SP_BSS_OFFSET.

config SYS_INIT_SP_BSS_OFFSET
	int "Early stack offset from the .bss base address"
	depends on INIT_SP_RELATIVE
	default 524288
	help
	  This option's value is the offset added to &_bss_start in order to
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	  calculate the stack pointer. This offset should be large enough so
	  that the early malloc region, global data (gd), and early stack usage
	  do not overlap any appended DTB.
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config LINUX_KERNEL_IMAGE_HEADER
	bool
	help
	  Place a Linux kernel image header at the start of the U-Boot binary.
	  The format of the header is described in the Linux kernel source at
	  Documentation/arm64/booting.txt. This feature is useful since the
	  image header reports the amount of memory (BSS and similar) that
	  U-Boot needs to use, but which isn't part of the binary.

if LINUX_KERNEL_IMAGE_HEADER
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
	hex
	help
	  The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
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	  TEXT_OFFSET value written to the Linux kernel image header.
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endif
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endif

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config GIC_V3_ITS
	bool "ARM GICV3 ITS"
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	select REGMAP
	select SYSCON
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	help
	  ARM GICV3 Interrupt translation service (ITS).
	  Basic support for programming locality specific peripheral
	  interrupts (LPI) configuration tables and enable LPI tables.
	  LPI configuration table can be used by u-boot or Linux.
	  ARM GICV3 has limitation, once the LPI table is enabled, LPI
	  configuration table can not be re-programmed, unless GICV3 reset.

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config STATIC_RELA
	bool
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	default y if ARM64
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config DMA_ADDR_T_64BIT
	bool
	default y if ARM64

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config HAS_VBAR
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	bool
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config HAS_THUMB2
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	bool
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# Used for compatibility with asm files copied from the kernel
config ARM_ASM_UNIFIED
	bool
	default y

# Used for compatibility with asm files copied from the kernel
config THUMB2_KERNEL
	bool

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config SYS_ICACHE_OFF
	bool "Do not enable icache"
	default n
	help
	  Do not enable instruction cache in U-Boot.

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config SPL_SYS_ICACHE_OFF
	bool "Do not enable icache in SPL"
	depends on SPL
	default SYS_ICACHE_OFF
	help
	  Do not enable instruction cache in SPL.

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config SYS_DCACHE_OFF
	bool "Do not enable dcache"
	default n
	help
	  Do not enable data cache in U-Boot.

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config SPL_SYS_DCACHE_OFF
	bool "Do not enable dcache in SPL"
	depends on SPL
	default SYS_DCACHE_OFF
	help
	  Do not enable data cache in SPL.

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config SYS_ARM_CACHE_CP15
	bool "CP15 based cache enabling support"
	help
	  Select this if your processor suports enabling caches by using
	  CP15 registers.

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config SYS_ARM_MMU
	bool "MMU-based Paged Memory Management Support"
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	select SYS_ARM_CACHE_CP15
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	help
	  Select if you want MMU-based virtualised addressing space
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	  support via paged memory management.
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config SYS_ARM_MPU
	bool 'Use the ARM v7 PMSA Compliant MPU'
	help
	  Some ARM systems without an MMU have instead a Memory Protection
	  Unit (MPU) that defines the type and permissions for regions of
	  memory.
	  If your CPU has an MPU then you should choose 'y' here unless you
	  know that you do not want to use the MPU.

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# If set, the workarounds for these ARM errata are applied early during U-Boot
# startup. Note that in general these options force the workarounds to be
# applied; no CPU-type/version detection exists, unlike the similar options in
# the Linux kernel. Do not set these options unless they apply!  Also note that
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# the following can be machine-specific errata. These do have ability to
# provide rudimentary version and machine-specific checks, but expect no
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# product checks:
# CONFIG_ARM_ERRATA_430973
# CONFIG_ARM_ERRATA_454179
# CONFIG_ARM_ERRATA_621766
# CONFIG_ARM_ERRATA_798870
# CONFIG_ARM_ERRATA_801819
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# CONFIG_ARM_CORTEX_A8_CVE_2017_5715
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# CONFIG_ARM_CORTEX_A15_CVE_2017_5715
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config ARM_ERRATA_430973
	bool

config ARM_ERRATA_454179
	bool

config ARM_ERRATA_621766
	bool

config ARM_ERRATA_716044
	bool

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config ARM_ERRATA_725233
	bool

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config ARM_ERRATA_742230
	bool

config ARM_ERRATA_743622
	bool

config ARM_ERRATA_751472
	bool

config ARM_ERRATA_761320
	bool

config ARM_ERRATA_773022
	bool

config ARM_ERRATA_774769
	bool

config ARM_ERRATA_794072
	bool

config ARM_ERRATA_798870
	bool

config ARM_ERRATA_801819
	bool

config ARM_ERRATA_826974
	bool

config ARM_ERRATA_828024
	bool

config ARM_ERRATA_829520
	bool

config ARM_ERRATA_833069
	bool

config ARM_ERRATA_833471
	bool

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config ARM_ERRATA_845369
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	bool
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config ARM_ERRATA_852421
	bool

config ARM_ERRATA_852423
	bool

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config ARM_ERRATA_855873
	bool

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config ARM_CORTEX_A8_CVE_2017_5715
	bool

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config ARM_CORTEX_A15_CVE_2017_5715
	bool

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config CPU_ARM720T
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	bool
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	select SYS_CACHE_SHIFT_5
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	imply SYS_ARM_MMU
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config CPU_ARM920T
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	bool
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	select SYS_CACHE_SHIFT_5
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	imply SYS_ARM_MMU
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config CPU_ARM926EJS
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	bool
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	select SYS_CACHE_SHIFT_5
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	imply SYS_ARM_MMU
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config CPU_ARM946ES
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	bool
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	select SYS_CACHE_SHIFT_5
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	imply SYS_ARM_MMU
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config CPU_ARM1136
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	bool
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	select SYS_CACHE_SHIFT_5
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	imply SYS_ARM_MMU
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config CPU_ARM1176
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	bool
	select HAS_VBAR
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	select SYS_CACHE_SHIFT_5
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	imply SYS_ARM_MMU
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config CPU_V7A
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	bool
	select HAS_THUMB2
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	select HAS_VBAR
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	select SYS_CACHE_SHIFT_6
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	imply SYS_ARM_MMU
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config CPU_V7M
	bool
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	select HAS_THUMB2
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	select SYS_ARM_MPU
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	select SYS_CACHE_SHIFT_5
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	select SYS_THUMB_BUILD
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	select THUMB2_KERNEL
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config CPU_V7R
	bool
	select HAS_THUMB2
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	select SYS_ARM_CACHE_CP15
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	select SYS_ARM_MPU
	select SYS_CACHE_SHIFT_6
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config CPU_PXA
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	bool
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	select SYS_CACHE_SHIFT_5
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	imply SYS_ARM_MMU
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config CPU_SA1100
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	bool
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	select SYS_CACHE_SHIFT_5
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	imply SYS_ARM_MMU
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config SYS_CPU
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	default "arm720t" if CPU_ARM720T
	default "arm920t" if CPU_ARM920T
	default "arm926ejs" if CPU_ARM926EJS
	default "arm946es" if CPU_ARM946ES
	default "arm1136" if CPU_ARM1136
	default "arm1176" if CPU_ARM1176
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	default "armv7" if CPU_V7A
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	default "armv7" if CPU_V7R
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	default "armv7m" if CPU_V7M
	default "pxa" if CPU_PXA
	default "sa1100" if CPU_SA1100
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	default "armv8" if ARM64
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config SYS_ARM_ARCH
	int
	default 4 if CPU_ARM720T
	default 4 if CPU_ARM920T
	default 5 if CPU_ARM926EJS
	default 5 if CPU_ARM946ES
	default 6 if CPU_ARM1136
	default 6 if CPU_ARM1176
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	default 7 if CPU_V7A
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	default 7 if CPU_V7M
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	default 7 if CPU_V7R
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	default 5 if CPU_PXA
	default 4 if CPU_SA1100
	default 8 if ARM64

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config SYS_CACHE_SHIFT_5
	bool

config SYS_CACHE_SHIFT_6
	bool

config SYS_CACHE_SHIFT_7
	bool

config SYS_CACHELINE_SIZE
	int
	default 128 if SYS_CACHE_SHIFT_7
	default 64 if SYS_CACHE_SHIFT_6
	default 32 if SYS_CACHE_SHIFT_5

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choice
	prompt "Select the ARM data write cache policy"
	default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
					      TARGET_BCMNSP || CPU_PXA || RZA1
	default SYS_ARM_CACHE_WRITEBACK

config SYS_ARM_CACHE_WRITEBACK
	bool "Write-back (WB)"
	help
	  A write updates the cache only and marks the cache line as dirty.
	  External memory is updated only when the line is evicted or explicitly
	  cleaned.

config SYS_ARM_CACHE_WRITETHROUGH
	bool "Write-through (WT)"
	help
	  A write updates both the cache and the external memory system.
	  This does not mark the cache line as dirty.

config SYS_ARM_CACHE_WRITEALLOC
	bool "Write allocation (WA)"
	help
	  A cache line is allocated on a write miss. This means that executing a
	  store instruction on the processor might cause a burst read to occur.
	  There is a linefill to obtain the data for the cache line, before the
	  write is performed.
endchoice

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config ARCH_CPU_INIT
	bool "Enable ARCH_CPU_INIT"
	help
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	  Some architectures require a call to arch_cpu_init().
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	  Say Y here to enable it

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config SYS_ARCH_TIMER
	bool "ARM Generic Timer support"
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	depends on CPU_V7A || ARM64
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	default y if ARM64
	help
	  The ARM Generic Timer (aka arch-timer) provides an architected
	  interface to a timer source on an SoC.
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	  It is mandatory for ARMv8 implementation and widely available
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	  on ARMv7 systems.

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config ARM_SMCCC
	bool "Support for ARM SMC Calling Convention (SMCCC)"
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	depends on CPU_V7A || ARM64
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	select ARM_PSCI_FW
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	help
	  Say Y here if you want to enable ARM SMC Calling Convention.
	  This should be enabled if U-Boot needs to communicate with system
	  firmware (for example, PSCI) according to SMCCC.

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config SEMIHOSTING
	bool "support boot from semihosting"
	help
	  In emulated environments, semihosting is a way for
	  the hosted environment to call out to the emulator to
	  retrieve files from the host machine.

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config SYS_THUMB_BUILD
	bool "Build U-Boot using the Thumb instruction set"
	depends on !ARM64
	help
	   Use this flag to build U-Boot using the Thumb instruction set for
	   ARM architectures. Thumb instruction set provides better code
	   density. For ARM architectures that support Thumb2 this flag will
	   result in Thumb2 code generated by GCC.

config SPL_SYS_THUMB_BUILD
	bool "Build SPL using the Thumb instruction set"
	default y if SYS_THUMB_BUILD
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	depends on !ARM64 && SPL
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	help
	   Use this flag to build SPL using the Thumb instruction set for
	   ARM architectures. Thumb instruction set provides better code
	   density. For ARM architectures that support Thumb2 this flag will
	   result in Thumb2 code generated by GCC.

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config TPL_SYS_THUMB_BUILD
	bool "Build TPL using the Thumb instruction set"
	default y if SYS_THUMB_BUILD
	depends on TPL && !ARM64
	help
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	   Use this flag to build TPL using the Thumb instruction set for
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	   ARM architectures. Thumb instruction set provides better code
	   density. For ARM architectures that support Thumb2 this flag will
	   result in Thumb2 code generated by GCC.


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config SYS_L2CACHE_OFF
	bool "L2cache off"
	help
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	  If SoC does not support L2CACHE or one does not want to enable
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	  L2CACHE, choose this option.

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config ENABLE_ARM_SOC_BOOT0_HOOK
	bool "prepare BOOT0 header"
	help
	  If the SoC's BOOT0 requires a header area filled with (magic)
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	  values, then choose this option, and create a file included as
	  <asm/arch/boot0.h> which contains the required assembler code.
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config ARM_CORTEX_CPU_IS_UP
	bool
	default n

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config USE_ARCH_MEMCPY
	bool "Use an assembly optimized implementation of memcpy"
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	default y
	depends on !ARM64
	help
	  Enable the generation of an optimized version of memcpy.
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	  Such an implementation may be faster under some conditions
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	  but may increase the binary size.

config SPL_USE_ARCH_MEMCPY
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	bool "Use an assembly optimized implementation of memcpy for SPL"
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	default y if USE_ARCH_MEMCPY
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	depends on !ARM64 && SPL
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	help
	  Enable the generation of an optimized version of memcpy.
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	  Such an implementation may be faster under some conditions
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	  but may increase the binary size.

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config TPL_USE_ARCH_MEMCPY
	bool "Use an assembly optimized implementation of memcpy for TPL"
	default y if USE_ARCH_MEMCPY
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	depends on !ARM64 && TPL
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	help
	  Enable the generation of an optimized version of memcpy.
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	  but may increase the binary size.

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config USE_ARCH_MEMSET
	bool "Use an assembly optimized implementation of memset"
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	default y
	depends on !ARM64
	help
	  Enable the generation of an optimized version of memset.
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	  but may increase the binary size.

config SPL_USE_ARCH_MEMSET
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	bool "Use an assembly optimized implementation of memset for SPL"
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	default y if USE_ARCH_MEMSET
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	depends on !ARM64 && SPL
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	help
	  Enable the generation of an optimized version of memset.
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	  but may increase the binary size.

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config TPL_USE_ARCH_MEMSET
	bool "Use an assembly optimized implementation of memset for TPL"
	default y if USE_ARCH_MEMSET
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	depends on !ARM64 && TPL
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	help
	  Enable the generation of an optimized version of memset.
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	  but may increase the binary size.

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config ARM64_SUPPORT_AARCH32
	bool "ARM64 system support AArch32 execution state"
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	depends on ARM64
	default y if !TARGET_THUNDERX_88XX
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	help
	  This ARM64 system supports AArch32 execution state.

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choice
	prompt "Target select"
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	default TARGET_HIKEY
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config ARCH_AT91
	bool "Atmel AT91"
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	select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
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	select SPL_SEPARATE_BSS if SPL
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config TARGET_EDB93XX
	bool "Support edb93xx"
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	select CPU_ARM920T
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	select PL010_SERIAL
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config TARGET_ASPENITE
	bool "Support aspenite"
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	select CPU_ARM926EJS
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config TARGET_GPLUGD
	bool "Support gplugd"
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	select CPU_ARM926EJS
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config ARCH_DAVINCI
	bool "TI DaVinci"
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	select CPU_ARM926EJS
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	select SPL_DM_SPI if SPL
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	imply CMD_SAVES
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	help
	  Support for TI's DaVinci platform.
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config ARCH_KIRKWOOD
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	bool "Marvell Kirkwood"
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	select ARCH_MISC_INIT
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	select BOARD_EARLY_INIT_F
	select CPU_ARM926EJS
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config ARCH_MVEBU
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	bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
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	select DM
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	select DM_ETH
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	select DM_SERIAL
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	select DM_SPI
	select DM_SPI_FLASH
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	select SPL_DM_SPI if SPL
	select SPL_DM_SPI_FLASH if SPL
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	select OF_CONTROL
	select OF_SEPARATE
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	select SPI
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	imply CMD_DM
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config TARGET_APF27
	bool "Support apf27"
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	select CPU_ARM926EJS
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	select SUPPORT_SPL
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config ARCH_ORION5X
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	bool "Marvell Orion"
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	select CPU_ARM926EJS
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config TARGET_SPEAR300
	bool "Support spear300"
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	select BOARD_EARLY_INIT_F
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	select CPU_ARM926EJS
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	select PL011_SERIAL
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	imply CMD_SAVES
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config TARGET_SPEAR310
	bool "Support spear310"
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	select BOARD_EARLY_INIT_F
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	select CPU_ARM926EJS
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	select PL011_SERIAL
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	imply CMD_SAVES
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config TARGET_SPEAR320
	bool "Support spear320"
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	select BOARD_EARLY_INIT_F
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	select CPU_ARM926EJS
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	select PL011_SERIAL
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	imply CMD_SAVES
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config TARGET_SPEAR600
	bool "Support spear600"
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	select BOARD_EARLY_INIT_F
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	select CPU_ARM926EJS
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	select PL011_SERIAL
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	imply CMD_SAVES
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config TARGET_STV0991
	bool "Support stv0991"
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	select CPU_V7A
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	select DM
	select DM_SERIAL
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	select DM_SPI
	select DM_SPI_FLASH
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	select PL01X_SERIAL
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	select SPI
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	select SPI_FLASH
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	imply CMD_DM
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config TARGET_X600
	bool "Support x600"
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	select BOARD_LATE_INIT
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	select CPU_ARM926EJS
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	select PL011_SERIAL
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	select SUPPORT_SPL
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config TARGET_FLEA3
	bool "Support flea3"
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	select CPU_ARM1136
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config TARGET_MX35PDK
	bool "Support mx35pdk"
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	select BOARD_LATE_INIT
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	select CPU_ARM1136
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config ARCH_BCM283X
	bool "Broadcom BCM283X family"
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	select DM
	select DM_GPIO
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	select DM_SERIAL
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	select OF_CONTROL
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	select PL01X_SERIAL
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	select SERIAL_SEARCH_ALL
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	imply CMD_DM
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	imply FAT_WRITE
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config ARCH_BCM63158
	bool "Broadcom BCM63158 family"
	select DM
	select OF_CONTROL
	imply CMD_DM

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config ARCH_BCM68360
	bool "Broadcom BCM68360 family"
	select DM
	select OF_CONTROL
	imply CMD_DM

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config ARCH_BCM6858
	bool "Broadcom BCM6858 family"
	select DM
	select OF_CONTROL
	imply CMD_DM

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config TARGET_VEXPRESS_CA15_TC2
	bool "Support vexpress_ca15_tc2"
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	select CPU_V7A
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	select CPU_V7_HAS_NONSEC
	select CPU_V7_HAS_VIRT
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	select PL011_SERIAL
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config ARCH_BCMSTB
	bool "Broadcom BCM7XXX family"
	select CPU_V7A
	select DM
	select OF_CONTROL
	select OF_PRIOR_STAGE
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	imply CMD_DM
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	help
	  This enables support for Broadcom ARM-based set-top box
	  chipsets, including the 7445 family of chips.

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config TARGET_VEXPRESS_CA5X2
	bool "Support vexpress_ca5x2"
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	select CPU_V7A
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	select PL011_SERIAL
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config TARGET_VEXPRESS_CA9X4
	bool "Support vexpress_ca9x4"
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	select CPU_V7A
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	select PL011_SERIAL
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config TARGET_BCM23550_W1D
	bool "Support bcm23550_w1d"
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	select CPU_V7A
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	imply CRC32_VERIFY
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	imply FAT_WRITE
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config TARGET_BCM28155_AP
	bool "Support bcm28155_ap"
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	select CPU_V7A
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	imply CRC32_VERIFY
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	imply FAT_WRITE
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config TARGET_BCMCYGNUS
	bool "Support bcmcygnus"
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	select CPU_V7A
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	imply BCM_SF2_ETH
	imply BCM_SF2_ETH_GMAC
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	imply CMD_HASH
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	imply CRC32_VERIFY
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	imply FAT_WRITE
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	imply HASH_VERIFY
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	imply NETDEVICES
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config TARGET_BCMNSP
	bool "Support bcmnsp"
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	select CPU_V7A
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config TARGET_BCMNS2
	bool "Support Broadcom Northstar2"
	select ARM64
	help
	  Support for Broadcom Northstar 2 SoCs.  NS2 is a quad-core 64-bit
	  ARMv8 Cortex-A57 processors targeting a broad range of networking
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	  applications.
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config TARGET_BCMNS3
	bool "Support Broadcom NS3"
	select ARM64
	select BOARD_LATE_INIT
	help
	  Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
	  ARMv8 Cortex-A72 processors targeting a broad range of networking
	  applications.

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config ARCH_EXYNOS
	bool "Samsung EXYNOS"
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	select DM
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	select DM_GPIO
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	select DM_I2C
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	select DM_KEYBOARD
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	select DM_SERIAL
	select DM_SPI
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	select DM_SPI_FLASH
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	select SPI
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	imply SYS_THUMB_BUILD
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	imply CMD_DM
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	imply FAT_WRITE
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config ARCH_S5PC1XX
	bool "Samsung S5PC1XX"
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	select CPU_V7A
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	select DM
	select DM_GPIO
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	select DM_I2C
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	select DM_SERIAL
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	imply CMD_DM
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config ARCH_HIGHBANK
	bool "Calxeda Highbank"
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	select CPU_V7A
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	select PL011_SERIAL
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config ARCH_INTEGRATOR
	bool "ARM Ltd. Integrator family"
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	select DM
	select DM_SERIAL
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	select PL01X_SERIAL
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	imply CMD_DM
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config ARCH_IPQ40XX
	bool "Qualcomm IPQ40xx SoCs"
	select CPU_V7A
	select DM
	select DM_GPIO
	select DM_SERIAL
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	select DM_RESET
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	select MSM_SMEM
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	select PINCTRL
	select CLK
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	select SMEM
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	select OF_CONTROL
	imply CMD_DM

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config ARCH_KEYSTONE
	bool "TI Keystone"
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	select CMD_POWEROFF
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	select CPU_V7A
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	select SUPPORT_SPL
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	select SYS_ARCH_TIMER
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	select SYS_THUMB_BUILD
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	imply CMD_MTDPARTS
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	imply CMD_SAVES
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	imply FIT
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config ARCH_K3
	bool "Texas Instruments' K3 Architecture"
	select SPL
	select SUPPORT_SPL
	select FIT

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config ARCH_OMAP2PLUS
	bool "TI OMAP2+"
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	select CPU_V7A
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	select SPL_BOARD_INIT if SPL
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	select SPL_STACK_R if SPL
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	select SUPPORT_SPL
	imply FIT

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config ARCH_MESON
	bool "Amlogic Meson"
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	imply DISTRO_DEFAULTS
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	imply DM_RNG
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	help
	  Support for the Meson SoC family developed by Amlogic Inc.,
	  targeted at media players and tablet computers. We currently
	  support the S905 (GXBaby) 64-bit SoC.

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config ARCH_MEDIATEK
	bool "MediaTek SoCs"
	select DM
	select OF_CONTROL
	select SPL_DM if SPL
	select SPL_LIBCOMMON_SUPPORT if SPL
	select SPL_LIBGENERIC_SUPPORT if SPL
	select SPL_OF_CONTROL if SPL
	select SUPPORT_SPL
	help
	  Support for the MediaTek SoCs family developed by MediaTek Inc.
	  Please refer to doc/README.mediatek for more information.

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config ARCH_LPC32XX
	bool "NXP LPC32xx platform"
	select CPU_ARM926EJS
	select DM
	select DM_GPIO
	select DM_SERIAL
	select SPL_DM if SPL
	select SUPPORT_SPL
	imply CMD_DM

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config ARCH_IMX8
	bool "NXP i.MX8 platform"
	select ARM64
	select DM
	select OF_CONTROL
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	select ENABLE_ARM_SOC_BOOT0_HOOK
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config ARCH_IMX8M
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	bool "NXP i.MX8M platform"
	select ARM64
	select DM
	select SUPPORT_SPL
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	imply CMD_DM
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config ARCH_IMXRT
	bool "NXP i.MXRT platform"
	select CPU_V7M
	select DM
	select DM_SERIAL
	select SUPPORT_SPL
	imply CMD_DM

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config ARCH_MX23
	bool "NXP i.MX23 family"
	select CPU_ARM926EJS
	select PL011_SERIAL
	select SUPPORT_SPL

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config ARCH_MX25
	bool "NXP MX25"
	select CPU_ARM926EJS
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	imply MXC_GPIO
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config ARCH_MX28
	bool "NXP i.MX28 family"
	select CPU_ARM926EJS
	select PL011_SERIAL
	select SUPPORT_SPL

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config ARCH_MX31
	bool "NXP i.MX31 family"
	select CPU_ARM1136

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config ARCH_MX7ULP
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	bool "NXP MX7ULP"
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	select CPU_V7A
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	select ROM_UNIFIED_SECTIONS
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	imply MXC_GPIO
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	imply SYS_THUMB_BUILD
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config ARCH_MX7
	bool "Freescale MX7"
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	select ARCH_MISC_INIT
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	select CPU_V7A
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	select SYS_FSL_HAS_SEC if IMX_HAB
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	select SYS_FSL_SEC_COMPAT_4
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	select SYS_FSL_SEC_LE
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	imply BOARD_EARLY_INIT_F
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	imply MXC_GPIO
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	imply SYS_THUMB_BUILD
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config ARCH_MX6
	bool "Freescale MX6"
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	select CPU_V7A
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	select SYS_FSL_HAS_SEC
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	select SYS_FSL_SEC_COMPAT_4
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	select SYS_FSL_SEC_LE
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	imply MXC_GPIO
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	imply SYS_THUMB_BUILD
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if ARCH_MX6
config SPL_LDSCRIPT
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	default "arch/arm/mach-omap2/u-boot-spl.lds"
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endif

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config ARCH_MX5
	bool "Freescale MX5"
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	select BOARD_EARLY_INIT_F
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	select CPU_V7A
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	imply MXC_GPIO
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config ARCH_NEXELL
	bool "Nexell S5P4418/S5P6818 SoC"
	select ENABLE_ARM_SOC_BOOT0_HOOK
	select DM

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config ARCH_OWL
	bool "Actions Semi OWL SoCs"
	select DM
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	select DM_ETH
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	select DM_SERIAL
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	select OWL_SERIAL
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	select CLK
	select CLK_OWL
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	select OF_CONTROL
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	select SYS_RELOC_GD_ENV_ADDR
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	imply CMD_DM
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config ARCH_QEMU
	bool "QEMU Virtual Platform"
	select DM
	select DM_SERIAL
	select OF_CONTROL
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	select PL01X_SERIAL
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	imply CMD_DM
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	imply DM_RNG
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	imply DM_RTC
	imply RTC_PL031
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config ARCH_RMOBILE
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	bool "Renesas ARM SoCs"
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	select DM
	select DM_SERIAL
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	imply BOARD_EARLY_INIT_F
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	imply CMD_DM
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	imply FAT_WRITE
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	imply SYS_THUMB_BUILD
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	imply ARCH_MISC_INIT if DISPLAY_CPUINFO
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config TARGET_S32V234EVB
	bool "Support s32v234evb"
	select ARM64
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	select SYS_FSL_ERRATUM_ESDHC111
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config ARCH_SNAPDRAGON
	bool "Qualcomm Snapdragon SoCs"
	select ARM64
	select DM
	select DM_GPIO
	select DM_SERIAL
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	select MSM_SMEM
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	select OF_CONTROL
	select OF_SEPARATE
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	select SMEM
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	select SPMI
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	imply CMD_DM
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config ARCH_SOCFPGA
	bool "Altera SOCFPGA family"
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	select ARCH_EARLY_INIT_R
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	select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
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	select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
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	select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
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	select DM
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	select DM_SERIAL
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	select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
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	select OF_CONTROL
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	select SPL_DM_RESET if DM_RESET
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	select SPL_DM_SERIAL
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	select SPL_LIBCOMMON_SUPPORT
	select SPL_LIBGENERIC_SUPPORT
	select SPL_NAND_SUPPORT if SPL_NAND_DENALI
	select SPL_OF_CONTROL
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	select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
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	select SPL_SERIAL_SUPPORT
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	select SPL_SYSRESET
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	select SPL_WATCHDOG_SUPPORT
	select SUPPORT_SPL
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	select SYS_NS16550
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	select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
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	select SYSRESET
	select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
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	select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
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	imply CMD_DM
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	imply CMD_MTDPARTS
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	imply CRC32_VERIFY
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	imply DM_SPI
	imply DM_SPI_FLASH
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	imply FAT_WRITE
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	imply SPL
	imply SPL_DM
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	imply SPL_DM_SPI
	imply SPL_DM_SPI_FLASH
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	imply SPL_LIBDISK_SUPPORT
	imply SPL_MMC_SUPPORT
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	imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
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	imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
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	imply SPL_SPI_FLASH_SUPPORT
	imply SPL_SPI_SUPPORT
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	imply L2X0_CACHE
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config ARCH_SUNXI
	bool "Support sunxi (Allwinner) SoCs"
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	select BINMAN
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	select CMD_GPIO
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	select CMD_MMC if MMC
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	select CMD_USB if DISTRO_DEFAULTS
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	select CLK
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	select DM
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	select DM_ETH
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	select DM_GPIO
	select DM_KEYBOARD
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	select DM_MMC if MMC
	select DM_SCSI if SCSI
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	select DM_SERIAL
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	select DM_USB if DISTRO_DEFAULTS
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	select OF_BOARD_SETUP
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	select OF_CONTROL
	select OF_SEPARATE
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	select SPECIFY_CONSOLE_INDEX
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	select SPL_STACK_R if SPL
	select SPL_SYS_MALLOC_SIMPLE if SPL
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	select SPL_SYS_THUMB_BUILD if !ARM64
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	select SUNXI_GPIO
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	select SYS_NS16550
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	select SYS_THUMB_BUILD if !ARM64
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	select USB if DISTRO_DEFAULTS
	select USB_KEYBOARD if DISTRO_DEFAULTS
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	select USB_STORAGE if DISTRO_DEFAULTS
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	select SPL_USE_TINY_PRINTF
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	select USE_PREBOOT
	select SYS_RELOC_GD_ENV_ADDR
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	imply CMD_DM
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	imply CMD_GPT
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	imply CMD_UBI if MTD_RAW_NAND
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	imply DISTRO_DEFAULTS
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	imply FAT_WRITE
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	imply FIT
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	imply OF_LIBFDT_OVERLAY
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	imply PRE_CONSOLE_BUFFER
	imply SPL_GPIO_SUPPORT
	imply SPL_LIBCOMMON_SUPPORT
	imply SPL_LIBGENERIC_SUPPORT
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	imply SPL_MMC_SUPPORT if MMC
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	imply SPL_POWER_SUPPORT
	imply SPL_SERIAL_SUPPORT
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	imply USB_GADGET
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config ARCH_U8500
	bool "ST-Ericsson U8500 Series"
	select CPU_V7A
	select DM
	select DM_GPIO
	select DM_MMC if MMC
	select DM_SERIAL
	select DM_USB if USB
	select OF_CONTROL
	select SYSRESET
	select TIMER
	imply ARM_PL180_MMCI
	imply DM_RTC
	imply NOMADIK_MTU_TIMER
	imply PL01X_SERIAL
	imply RTC_PL031
	imply SYSRESET_SYSCON

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config ARCH_VERSAL
	bool "Support Xilinx Versal Platform"
	select ARM64
	select CLK
	select DM
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	select DM_ETH if NET
	select DM_MMC if MMC
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	select DM_SERIAL
	select OF_CONTROL
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	imply BOARD_LATE_INIT
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	imply ENV_VARS_UBOOT_RUNTIME_CONFIG
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config ARCH_VF610
	bool "Freescale Vybrid"
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	select CPU_V7A
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	select SYS_FSL_ERRATUM_ESDHC111
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	imply CMD_MTDPARTS
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	imply MTD_RAW_NAND
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config ARCH_ZYNQ
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	bool "Xilinx Zynq based platform"
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	select CLK
	select CLK_ZYNQ
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	select CPU_V7A
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	select DM
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	select DM_ETH if NET
	select DM_MMC if MMC
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	select DM_SERIAL
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	select DM_SPI
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	select DM_SPI_FLASH
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	select DM_USB if USB
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	select OF_CONTROL
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	select SPI
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	select SPL_BOARD_INIT if SPL
	select SPL_CLK if SPL
	select SPL_DM if SPL
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	select SPL_DM_SPI if SPL
	select SPL_DM_SPI_FLASH if SPL
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	select SPL_OF_CONTROL if SPL
	select SPL_SEPARATE_BSS if SPL
	select SUPPORT_SPL
	imply ARCH_EARLY_INIT_R
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	imply BOARD_LATE_INIT
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	imply CMD_CLK
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	imply CMD_DM
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	imply CMD_SPL
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	imply ENV_VARS_UBOOT_RUNTIME_CONFIG
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	imply FAT_WRITE
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config ARCH_ZYNQMP_R5
	bool "Xilinx ZynqMP R5 based platform"
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	select CLK
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	select CPU_V7R
	select DM
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	select DM_ETH if NET
	select DM_MMC if MMC
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	select DM_SERIAL
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	select OF_CONTROL
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	imply CMD_DM
1141
	imply DM_USB_GADGET
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config ARCH_ZYNQMP
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	bool "Xilinx ZynqMP based platform"
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	select ARM64
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	select CLK
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	select DM
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	select DM_ETH if NET
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	select DM_MAILBOX
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	select DM_MMC if MMC
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	select DM_SERIAL
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	select DM_SPI if SPI
	select DM_SPI_FLASH if DM_SPI
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	select DM_USB if USB
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	select FIRMWARE
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	select OF_CONTROL
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	select SPL_BOARD_INIT if SPL
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	select SPL_CLK if SPL
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	select SPL_DM if SPL
	select SPL_DM_SPI if SPI && SPL_DM
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	select SPL_DM_SPI_FLASH if SPL_DM_SPI
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	select SPL_DM_MAILBOX if SPL
	select SPL_FIRMWARE if SPL
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	select SPL_SEPARATE_BSS if SPL
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	select SUPPORT_SPL
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	select ZYNQMP_IPI
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	imply BOARD_LATE_INIT
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	imply CMD_DM
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	imply ENV_VARS_UBOOT_RUNTIME_CONFIG
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	imply FAT_WRITE
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	imply MP
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	imply DM_USB_GADGET
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config ARCH_TEGRA
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	bool "NVIDIA Tegra"
1176
	imply DISTRO_DEFAULTS
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	imply FAT_WRITE
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1179
config TARGET_VEXPRESS64_AEMV8A
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	bool "Support vexpress_aemv8a"
1181
	select ARM64
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	select PL01X_SERIAL
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config TARGET_VEXPRESS64_BASE_FVP
	bool "Support Versatile Express ARMv8a FVP BASE model"
	select ARM64
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	select PL01X_SERIAL
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	select SEMIHOSTING
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config TARGET_VEXPRESS64_JUNO
	bool "Support Versatile Express Juno Development Platform"
	select ARM64
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	select PL01X_SERIAL
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	select DM
	select OF_CONTROL
	select OF_BOARD
	select CLK
	select DM_SERIAL
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	select ARM_PSCI_FW
	select PSCI_RESET
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	select DM_ETH
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	select BLK
	select USB
	select DM_USB
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config TARGET_TOTAL_COMPUTE
	bool "Support Total Compute Platform"
	select ARM64
	select PL01X_SERIAL
	select DM
	select DM_SERIAL
	select DM_MMC
	select DM_GPIO

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config TARGET_LS2080A_EMU
	bool "Support ls2080a_emu"
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	select ARCH_LS2080A
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	select ARM64
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	select ARMV8_MULTIENTRY
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	select FSL_DDR_SYNC_REFRESH
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	help
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	  Support for Freescale LS2080A_EMU platform.
	  The LS2080A Development System (EMULATOR) is a pre-silicon
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	  development platform that supports the QorIQ LS2080A
	  Layerscape Architecture processor.
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config TARGET_LS2080A_SIMU
	bool "Support ls2080a_simu"
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	select ARCH_LS2080A
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	select ARM64
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	select ARMV8_MULTIENTRY
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	select BOARD_LATE_INIT
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	help
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	  Support for Freescale LS2080A_SIMU platform.
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	  The LS2080A Development System (QDS) is a pre silicon
	  development platform that supports the QorIQ LS2080A
	  Layerscape Architecture processor.
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config TARGET_LS1088AQDS
	bool "Support ls1088aqds"
	select ARCH_LS1088A
	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
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	select SUPPORT_SPL
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	select FSL_DDR_INTERACTIVE if !SD_BOOT
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	help
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	  Support for NXP LS1088AQDS platform.
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	  The LS1088A Development System (QDS) is a high-performance
	  development platform that supports the QorIQ LS1088A
	  Layerscape Architecture processor.

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config TARGET_LS2080AQDS
	bool "Support ls2080aqds"
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	select ARCH_LS2080A
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	select ARM64
	select ARMV8_MULTIENTRY
1259
	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
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	select SUPPORT_SPL
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	imply SCSI
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	imply SCSI_AHCI
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	select FSL_DDR_BIST
	select FSL_DDR_INTERACTIVE if !SPL
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	help
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	  Support for Freescale LS2080AQDS platform.
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	  The LS2080A Development System (QDS) is a high-performance
	  development platform that supports the QorIQ LS2080A
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	  Layerscape Architecture processor.

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config TARGET_LS2080ARDB
	bool "Support ls2080ardb"
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	select ARCH_LS2080A
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	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
1279
	select SUPPORT_SPL
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	select FSL_DDR_BIST
	select FSL_DDR_INTERACTIVE if !SPL
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	imply SCSI
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	imply SCSI_AHCI
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	help
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	  Support for Freescale LS2080ARDB platform.
	  The LS2080A Reference design board (RDB) is a high-performance
	  development platform that supports the QorIQ LS2080A
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	  Layerscape Architecture processor.

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config TARGET_LS2081ARDB
	bool "Support ls2081ardb"
	select ARCH_LS2080A
	select ARM64
	select ARMV8_MULTIENTRY
	select BOARD_LATE_INIT
	select SUPPORT_SPL
	help
	  Support for Freescale LS2081ARDB platform.
	  The LS2081A Reference design board (RDB) is a high-performance
	  development platform that supports the QorIQ LS2081A/LS2041A
	  Layerscape Architecture processor.

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config TARGET_LX2160ARDB
	bool "Support lx2160ardb"
	select ARCH_LX2160A
	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
	help
	  Support for NXP LX2160ARDB platform.
	  The lx2160ardb (LX2160A Reference design board (RDB)
	  is a high-performance development platform that supports the
	  QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.

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config TARGET_LX2160AQDS
	bool "Support lx2160aqds"
	select ARCH_LX2160A
	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
	help
	  Support for NXP LX2160AQDS platform.
	  The lx2160aqds (LX2160A QorIQ Development System (QDS)
	  is a high-performance development platform that supports the
	  QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
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config TARGET_LX2162AQDS
	bool "Support lx2162aqds"
	select ARCH_LX2162A
	select ARCH_MISC_INIT
	select ARM64
	select ARMV8_MULTIENTRY
	select ARCH_SUPPORT_TFABOOT
	select BOARD_LATE_INIT
	help
	  Support for NXP LX2162AQDS platform.
	  The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
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config TARGET_HIKEY
	bool "Support HiKey 96boards Consumer Edition Platform"
	select ARM64
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	select DM
	select DM_GPIO
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	select DM_SERIAL
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	select OF_CONTROL
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	select PL01X_SERIAL
1349
	select SPECIFY_CONSOLE_INDEX
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	imply CMD_DM
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	  help
	  Support for HiKey 96boards platform. It features a HI6220
	  SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.

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config TARGET_HIKEY960
	bool "Support HiKey960 96boards Consumer Edition Platform"
	select ARM64
	select DM
	select DM_SERIAL
	select OF_CONTROL
	select PL01X_SERIAL
	imply CMD_DM
	  help
	  Support for HiKey960 96boards platform. It features a HI3660
	  SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.

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config TARGET_POPLAR
	bool "Support Poplar 96boards Enterprise Edition Platform"
	select ARM64
	select DM
	select DM_SERIAL
	select DM_USB
1373
	select OF_CONTROL
1374
	select PL01X_SERIAL
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	imply CMD_DM
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	  help
	  Support for Poplar 96boards EE platform. It features a HI3798cv200
	  SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
	  making it capable of running any commercial set-top solution based on
	  Linux or Android.

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config TARGET_LS1012AQDS
	bool "Support ls1012aqds"
1384
	select ARCH_LS1012A
1385
	select ARM64
1386
	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
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	help
	  Support for Freescale LS1012AQDS platform.
	  The LS1012A Development System (QDS) is a high-performance
	  development platform that supports the QorIQ LS1012A
	  Layerscape Architecture processor.

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config TARGET_LS1012ARDB
	bool "Support ls1012ardb"
1396
	select ARCH_LS1012A
1397
	select ARM64
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
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	imply SCSI
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	imply SCSI_AHCI
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	help
	  Support for Freescale LS1012ARDB platform.
	  The LS1012A Reference design board (RDB) is a high-performance
	  development platform that supports the QorIQ LS1012A
	  Layerscape Architecture processor.

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config TARGET_LS1012A2G5RDB
	bool "Support ls1012a2g5rdb"
	select ARCH_LS1012A
	select ARM64
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
	imply SCSI
	help
	  Support for Freescale LS1012A2G5RDB platform.
	  The LS1012A 2G5 Reference design board (RDB) is a high-performance
	  development platform that supports the QorIQ LS1012A
	  Layerscape Architecture processor.

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config TARGET_LS1012AFRWY
	bool "Support ls1012afrwy"
	select ARCH_LS1012A
	select ARM64
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
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	imply SCSI
	imply SCSI_AHCI
	help
	 Support for Freescale LS1012AFRWY platform.
	 The LS1012A FRWY board (FRWY) is a high-performance
	 development platform that supports the QorIQ LS1012A
	 Layerscape Architecture processor.

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config TARGET_LS1012AFRDM
	bool "Support ls1012afrdm"
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	select ARCH_LS1012A
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	select ARM64
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	select ARCH_SUPPORT_TFABOOT
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	help
	  Support for Freescale LS1012AFRDM platform.
	  The LS1012A Freedom  board (FRDM) is a high-performance
	  development platform that supports the QorIQ LS1012A
	  Layerscape Architecture processor.

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config TARGET_LS1028AQDS
	bool "Support ls1028aqds"
	select ARCH_LS1028A
	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
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	help
	  Support for Freescale LS1028AQDS platform
	  The LS1028A Development System (QDS) is a high-performance
	  development platform that supports the QorIQ LS1028A
	  Layerscape Architecture processor.

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config TARGET_LS1028ARDB
	bool "Support ls1028ardb"
	select ARCH_LS1028A
	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
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	help
	  Support for Freescale LS1028ARDB platform
	  The LS1028A Development System (RDB) is a high-performance
	  development platform that supports the QorIQ LS1028A
	  Layerscape Architecture processor.

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config TARGET_LS1088ARDB
	bool "Support ls1088ardb"
	select ARCH_LS1088A
	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
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	select SUPPORT_SPL
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	select FSL_DDR_INTERACTIVE if !SD_BOOT
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	help
	  Support for NXP LS1088ARDB platform.
	  The LS1088A Reference design board (RDB) is a high-performance
	  development platform that supports the QorIQ LS1088A
	  Layerscape Architecture processor.

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config TARGET_LS1021AQDS
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	bool "Support ls1021aqds"
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	select ARCH_LS1021A
	select ARCH_SUPPORT_PSCI
	select BOARD_EARLY_INIT_F
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	select BOARD_LATE_INIT
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	select CPU_V7A
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	select CPU_V7_HAS_NONSEC
	select CPU_V7_HAS_VIRT
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	select LS1_DEEP_SLEEP
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	select SUPPORT_SPL
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	select SYS_FSL_DDR
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	select FSL_DDR_INTERACTIVE
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	select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
	select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
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	imply SCSI
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config TARGET_LS1021ATWR
1505
	bool "Support ls1021atwr"
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1508
	select ARCH_LS1021A
	select ARCH_SUPPORT_PSCI
	select BOARD_EARLY_INIT_F
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	select BOARD_LATE_INIT
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	select CPU_V7A
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	select CPU_V7_HAS_NONSEC
	select CPU_V7_HAS_VIRT
1513
	select LS1_DEEP_SLEEP
1514
	select SUPPORT_SPL
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	select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
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	imply SCSI
1517

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config TARGET_LS1021ATSN
	bool "Support ls1021atsn"
	select ARCH_LS1021A
	select ARCH_SUPPORT_PSCI
	select BOARD_EARLY_INIT_F
	select BOARD_LATE_INIT
	select CPU_V7A
	select CPU_V7_HAS_NONSEC
	select CPU_V7_HAS_VIRT
	select LS1_DEEP_SLEEP
	select SUPPORT_SPL
	imply SCSI

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config TARGET_LS1021AIOT
	bool "Support ls1021aiot"
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	select ARCH_LS1021A
	select ARCH_SUPPORT_PSCI
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	select BOARD_LATE_INIT
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	select CPU_V7A
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	select CPU_V7_HAS_NONSEC
	select CPU_V7_HAS_VIRT
	select SUPPORT_SPL
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	select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
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1541
	imply SCSI
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	help
	  Support for Freescale LS1021AIOT platform.
	  The LS1021A Freescale board (IOT) is a high-performance
	  development platform that supports the QorIQ LS1021A
	  Layerscape Architecture processor.

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config TARGET_LS1043AQDS
	bool "Support ls1043aqds"
1550
	select ARCH_LS1043A
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	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_EARLY_INIT_F
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	select BOARD_LATE_INIT
1556
	select SUPPORT_SPL
1557
	select FSL_DDR_INTERACTIVE if !SPL
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	select FSL_DSPI if !SPL_NO_DSPI
	select DM_SPI_FLASH if FSL_DSPI
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1560
	imply SCSI
1561
	imply SCSI_AHCI
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	help
	  Support for Freescale LS1043AQDS platform.

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config TARGET_LS1043ARDB
	bool "Support ls1043ardb"
1567
	select ARCH_LS1043A
1568
	select ARM64
1569
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_EARLY_INIT_F
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	select BOARD_LATE_INIT
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	select SUPPORT_SPL
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	select FSL_DSPI if !SPL_NO_DSPI
	select DM_SPI_FLASH if FSL_DSPI
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	help
	  Support for Freescale LS1043ARDB platform.

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config TARGET_LS1046AQDS
	bool "Support ls1046aqds"
1581
	select ARCH_LS1046A
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	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_EARLY_INIT_F
1586
	select BOARD_LATE_INIT
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	select DM_SPI_FLASH if DM_SPI
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	select SUPPORT_SPL
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1591
	select FSL_DDR_BIST if !SPL
	select FSL_DDR_INTERACTIVE  if !SPL
	select FSL_DDR_INTERACTIVE if !SPL
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	imply SCSI
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	help
	  Support for Freescale LS1046AQDS platform.
	  The LS1046A Development System (QDS) is a high-performance
	  development platform that supports the QorIQ LS1046A
	  Layerscape Architecture processor.

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config TARGET_LS1046ARDB
	bool "Support ls1046ardb"
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	select ARCH_LS1046A
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	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_EARLY_INIT_F
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	select BOARD_LATE_INIT
1607
	select DM_SPI_FLASH if DM_SPI
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	select POWER_MC34VR500
1609
	select SUPPORT_SPL
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	select FSL_DDR_BIST
	select FSL_DDR_INTERACTIVE if !SPL
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	imply SCSI
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	help
	  Support for Freescale LS1046ARDB platform.
	  The LS1046A Reference Design Board (RDB) is a high-performance
	  development platform that supports the QorIQ LS1046A
	  Layerscape Architecture processor.

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config TARGET_LS1046AFRWY
	bool "Support ls1046afrwy"
	select ARCH_LS1046A
	select ARM64
	select ARMV8_MULTIENTRY
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	select ARCH_SUPPORT_TFABOOT
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	select BOARD_EARLY_INIT_F
	select BOARD_LATE_INIT
	select DM_SPI_FLASH if DM_SPI
	imply SCSI
	help
	  Support for Freescale LS1046AFRWY platform.
	  The LS1046A Freeway Board (FRWY) is a high-performance
	  development platform that supports the QorIQ LS1046A
	  Layerscape Architecture processor.
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config TARGET_SL28
	bool "Support sl28"
	select ARCH_LS1028A
	select ARM64
	select ARMV8_MULTIENTRY
	select SUPPORT_SPL
	select BINMAN
	help
	  Support for Kontron SMARC-sAL28 board.

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config TARGET_COLIBRI_PXA270
	bool "Support colibri_pxa270"
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	select CPU_PXA
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1649
config ARCH_UNIPHIER
1650
	bool "Socionext UniPhier SoCs"
1651
	select BOARD_LATE_INIT
1652
	select DM
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	select DM_ETH
1654
	select DM_GPIO
1655
	select DM_I2C
1656
	select DM_MMC
1657
	select DM_MTD
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	select DM_RESET
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	select DM_SERIAL
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	select DM_USB
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	select OF_BOARD_SETUP
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	select OF_CONTROL
	select OF_LIBFDT
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	select PINCTRL
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	select SPL_BOARD_INIT if SPL
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	select SPL_DM if SPL
	select SPL_LIBCOMMON_SUPPORT if SPL
	select SPL_LIBGENERIC_SUPPORT if SPL
	select SPL_OF_CONTROL if SPL
	select SPL_PINCTRL if SPL
1671
	select SUPPORT_SPL
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	imply CMD_DM
1673
	imply DISTRO_DEFAULTS
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Tom Rini committed
1674
	imply FAT_WRITE
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	help
	  Support for UniPhier SoC family developed by Socionext Inc.
	  (formerly, System LSI Business Division of Panasonic Corporation)
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config ARCH_STM32
1680
	bool "Support STMicroelectronics STM32 MCU with cortex M"
1681
	select CPU_V7M
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1683
	select DM
	select DM_SERIAL
Michal Simek's avatar
Michal Simek committed
1684
	imply CMD_DM
1685

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config ARCH_STI
	bool "Support STMicrolectronics SoCs"
1688
	select BLK
1689
	select CPU_V7A
1690
	select DM
1691
	select DM_MMC
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1692
	select DM_RESET
1693
	select DM_SERIAL
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	imply CMD_DM
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	help
	  Support for STMicroelectronics STiH407/10 SoC family.
	  This SoC is used on Linaro 96Board STiH410-B2260

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config ARCH_STM32MP
	bool "Support STMicroelectronics STM32MP Socs with cortex A"
1701
	select ARCH_MISC_INIT
1702
	select ARCH_SUPPORT_TFABOOT
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	select BOARD_LATE_INIT
	select CLK
	select DM
	select DM_GPIO
	select DM_RESET
	select DM_SERIAL
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	select MISC
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	select OF_CONTROL
	select OF_LIBFDT
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	select OF_SYSTEM_SETUP
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	select PINCTRL
	select REGMAP
	select SUPPORT_SPL
	select SYSCON
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	select SYSRESET
1718
	select SYS_THUMB_BUILD
1719
	imply SPL_SYSRESET
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	imply CMD_DM
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	imply CMD_POWEROFF
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	imply OF_LIBFDT_OVERLAY
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	imply ENV_VARS_UBOOT_RUNTIME_CONFIG
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	imply USE_PREBOOT
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	help
	  Support for STM32MP SoC family developed by STMicroelectronics,
	  MPUs based on ARM cortex A core
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	  U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
	  FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
	  chain.
	  SPL is the unsecure FSBL for the basic boot chain.
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config ARCH_ROCKCHIP
	bool "Support Rockchip SoCs"
1735
	select BLK
1736
	select BINMAN if SPL_OPTEE
1737
	select DM
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1740
	select DM_GPIO
	select DM_I2C
	select DM_MMC
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1742
	select DM_PWM
	select DM_REGULATOR
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	select DM_SERIAL
	select DM_SPI
	select DM_SPI_FLASH
1746
	select DM_USB if USB
1747
	select ENABLE_ARM_SOC_BOOT0_HOOK
1748
	select OF_CONTROL
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1749
	select SPI
1750
	select SPL_DM if SPL
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1752
	select SPL_DM_SPI if SPL
	select SPL_DM_SPI_FLASH if SPL
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	select SYS_MALLOC_F
	select SYS_THUMB_BUILD if !ARM64
	imply ADC
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	imply CMD_DM
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	imply DEBUG_UART_BOARD_INIT
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	imply DISTRO_DEFAULTS
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	imply FAT_WRITE
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	imply SARADC_ROCKCHIP
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	imply SPL_SYSRESET
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	imply SPL_SYS_MALLOC_SIMPLE
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	imply SYS_NS16550
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	imply TPL_SYSRESET
	imply USB_FUNCTION_FASTBOOT
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config ARCH_OCTEONTX
	bool "Support OcteonTX SoCs"
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	select CLK
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	select DM
	select ARM64
	select OF_CONTROL
	select OF_LIVE
	select BOARD_LATE_INIT
	select SYS_CACHE_SHIFT_7
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config ARCH_OCTEONTX2
	bool "Support OcteonTX2 SoCs"
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	select CLK
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	select DM
	select ARM64
	select OF_CONTROL
	select OF_LIVE
	select BOARD_LATE_INIT
	select SYS_CACHE_SHIFT_7

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config TARGET_THUNDERX_88XX
	bool "Support ThunderX 88xx"
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	select ARM64
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	select OF_CONTROL
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	select PL01X_SERIAL
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	select SYS_CACHE_SHIFT_7
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config ARCH_ASPEED
	bool "Support Aspeed SoCs"
	select DM
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	select OF_CONTROL
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	imply CMD_DM
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config TARGET_DURIAN
	bool "Support Phytium Durian Platform"
	select ARM64
	help
	  Support for durian platform.
	  It has 2GB Sdram, uart and pcie.

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config TARGET_PRESIDIO_ASIC
	bool "Support Cortina Presidio ASIC Platform"
	select ARM64

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config TARGET_XENGUEST_ARM64
	bool "Xen guest ARM64"
	select ARM64
	select XEN
	select OF_CONTROL
	select LINUX_KERNEL_IMAGE_HEADER
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	select XEN_SERIAL
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	select SSCANF
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endchoice

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config ARCH_SUPPORT_TFABOOT
	bool

config TFABOOT
	bool "Support for booting from TF-A"
	depends on ARCH_SUPPORT_TFABOOT
	default n
	help
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	  Some platforms support the setup of secure registers (for instance
	  for CPU errata handling) or provide secure services like PSCI.
	  Those services could also be provided by other firmware parts
	  like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
	  does not need to (and cannot) execute this code.
	  Enabling this option will make a U-Boot binary that is relying
	  on other firmware layers to provide secure functionality.
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config TI_SECURE_DEVICE
	bool "HS Device Type Support"
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	depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
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	help
	  If a high secure (HS) device type is being used, this config
	  must be set. This option impacts various aspects of the
	  build system (to create signed boot images that can be
	  authenticated) and the code. See the doc/README.ti-secure
	  file for further details.

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if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
config ISW_ENTRY_ADDR
	hex "Address in memory or XIP address of bootloader entry point"
	default 0x402F4000 if AM43XX
	default 0x402F0400 if AM33XX
	default 0x40301350 if OMAP54XX
	help
	  After any reset, the boot ROM searches the boot media for a valid
	  boot image. For non-XIP devices, the ROM then copies the image into
	  internal memory. For all boot modes, after the ROM processes the
	  boot image it eventually computes the entry point address depending
	  on the device type (secure/non-secure), boot media (xip/non-xip) and
	  image headers.
endif

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source "arch/arm/mach-aspeed/Kconfig"

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source "arch/arm/mach-at91/Kconfig"

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source "arch/arm/mach-bcm283x/Kconfig"
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source "arch/arm/mach-bcmstb/Kconfig"

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source "arch/arm/mach-davinci/Kconfig"
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source "arch/arm/mach-exynos/Kconfig"
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source "arch/arm/mach-highbank/Kconfig"
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source "arch/arm/mach-integrator/Kconfig"

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source "arch/arm/mach-ipq40xx/Kconfig"

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source "arch/arm/mach-k3/Kconfig"

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source "arch/arm/mach-keystone/Kconfig"
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source "arch/arm/mach-kirkwood/Kconfig"
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source "arch/arm/mach-lpc32xx/Kconfig"
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source "arch/arm/mach-mvebu/Kconfig"

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source "arch/arm/mach-octeontx/Kconfig"
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source "arch/arm/mach-octeontx2/Kconfig"

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source "arch/arm/cpu/armv7/ls102xa/Kconfig"

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source "arch/arm/mach-imx/mx2/Kconfig"

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source "arch/arm/mach-imx/mx3/Kconfig"

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source "arch/arm/mach-imx/mx5/Kconfig"

source "arch/arm/mach-imx/mx6/Kconfig"
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source "arch/arm/mach-imx/mx7/Kconfig"
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source "arch/arm/mach-imx/mx7ulp/Kconfig"
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source "arch/arm/mach-imx/imx8/Kconfig"

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source "arch/arm/mach-imx/imx8m/Kconfig"
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source "arch/arm/mach-imx/imxrt/Kconfig"

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source "arch/arm/mach-imx/mxs/Kconfig"

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source "arch/arm/mach-omap2/Kconfig"
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source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"

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source "arch/arm/mach-orion5x/Kconfig"
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source "arch/arm/mach-owl/Kconfig"

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source "arch/arm/mach-rmobile/Kconfig"
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source "arch/arm/mach-meson/Kconfig"

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source "arch/arm/mach-mediatek/Kconfig"

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source "arch/arm/mach-qemu/Kconfig"

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source "arch/arm/mach-rockchip/Kconfig"

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source "arch/arm/mach-s5pc1xx/Kconfig"
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source "arch/arm/mach-snapdragon/Kconfig"

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source "arch/arm/mach-socfpga/Kconfig"

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source "arch/arm/mach-sti/Kconfig"

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source "arch/arm/mach-stm32/Kconfig"

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source "arch/arm/mach-stm32mp/Kconfig"

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source "arch/arm/mach-sunxi/Kconfig"

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source "arch/arm/mach-tegra/Kconfig"
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source "arch/arm/mach-u8500/Kconfig"

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source "arch/arm/mach-uniphier/Kconfig"
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source "arch/arm/cpu/armv7/vf610/Kconfig"

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source "arch/arm/mach-zynq/Kconfig"
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source "arch/arm/mach-zynqmp/Kconfig"

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source "arch/arm/mach-versal/Kconfig"

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source "arch/arm/mach-zynqmp-r5/Kconfig"

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source "arch/arm/cpu/armv7/Kconfig"

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source "arch/arm/cpu/armv8/Kconfig"

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source "arch/arm/mach-imx/Kconfig"
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source "arch/arm/mach-nexell/Kconfig"

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source "board/armltd/total_compute/Kconfig"

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source "board/bosch/shc/Kconfig"
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source "board/bosch/guardian/Kconfig"
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source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/gplugd/Kconfig"
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source "board/Marvell/octeontx/Kconfig"
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source "board/Marvell/octeontx2/Kconfig"
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source "board/armadeus/apf27/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
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source "board/cortina/presidio-asic/Kconfig"
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source "board/broadcom/bcm23550_w1d/Kconfig"
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source "board/broadcom/bcm28155_ap/Kconfig"
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source "board/broadcom/bcm963158/Kconfig"
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source "board/broadcom/bcm968360bg/Kconfig"
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source "board/broadcom/bcm968580xref/Kconfig"
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source "board/broadcom/bcmcygnus/Kconfig"
source "board/broadcom/bcmnsp/Kconfig"
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source "board/broadcom/bcmns2/Kconfig"
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source "board/broadcom/bcmns3/Kconfig"
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source "board/cavium/thunderx/Kconfig"
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source "board/cirrus/edb93xx/Kconfig"
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source "board/eets/pdu001/Kconfig"
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source "board/emulation/qemu-arm/Kconfig"
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source "board/freescale/ls2080a/Kconfig"
source "board/freescale/ls2080aqds/Kconfig"
source "board/freescale/ls2080ardb/Kconfig"
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source "board/freescale/ls1088a/Kconfig"
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source "board/freescale/ls1028a/Kconfig"
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source "board/freescale/ls1021aqds/Kconfig"
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source "board/freescale/ls1043aqds/Kconfig"
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source "board/freescale/ls1021atwr/Kconfig"
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source "board/freescale/ls1021atsn/Kconfig"
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source "board/freescale/ls1021aiot/Kconfig"
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source "board/freescale/ls1046aqds/Kconfig"
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source "board/freescale/ls1043ardb/Kconfig"
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source "board/freescale/ls1046ardb/Kconfig"
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source "board/freescale/ls1046afrwy/Kconfig"
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source "board/freescale/ls1012aqds/Kconfig"
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source "board/freescale/ls1012ardb/Kconfig"
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source "board/freescale/ls1012afrdm/Kconfig"
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source "board/freescale/lx2160a/Kconfig"
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source "board/freescale/mx35pdk/Kconfig"
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source "board/freescale/s32v234evb/Kconfig"
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source "board/grinn/chiliboard/Kconfig"
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source "board/hisilicon/hikey/Kconfig"
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source "board/hisilicon/hikey960/Kconfig"
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source "board/hisilicon/poplar/Kconfig"
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source "board/isee/igep003x/Kconfig"
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source "board/kontron/sl28/Kconfig"
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source "board/myir/mys_6ulx/Kconfig"
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source "board/spear/spear300/Kconfig"
source "board/spear/spear310/Kconfig"
source "board/spear/spear320/Kconfig"
source "board/spear/spear600/Kconfig"
source "board/spear/x600/Kconfig"
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source "board/st/stv0991/Kconfig"
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source "board/tcl/sl50/Kconfig"
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source "board/toradex/colibri_pxa270/Kconfig"
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source "board/variscite/dart_6ul/Kconfig"
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source "board/vscom/baltos/Kconfig"
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source "board/phytium/durian/Kconfig"
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source "board/xen/xenguest_arm64/Kconfig"
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source "arch/arm/Kconfig.debug"

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endmenu
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config SPL_LDSCRIPT
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	default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
	default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
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	default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64