arm: dts: lx2160a: Add IO range

Add IO range property to fix below error on uboot
PCI: Failed autoconfig bar 18
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>

arch/arm/dts/fsl-lx2160a.dtsi

@@ -336,7 +336,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};
 
 	pcie@3500000 {
@@ -351,7 +352,8 @@
 		device_type = "pci";
 		num-lanes = <2>;
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};
 
 	pcie@3600000 {
@@ -365,7 +367,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0x90 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};
 
 	pcie@3700000 {
@@ -379,7 +382,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0x98 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};
 
 	pcie@3800000 {
@@ -393,7 +397,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0xa0 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};
 
 	pcie@3900000 {
@@ -407,7 +412,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0xa8 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};
 
 	fsl_mc: fsl-mc@80c000000 {