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Commit 4a3ab193 authored by York Sun's avatar York Sun
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armv8: ls2080a: Drop macro CONFIG_LS2080A 



Use CONFIG_ARCH_LS2080A instead.
Signed-off-by: default avatarYork Sun <york.sun@nxp.com>
parent 511fc86d
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Showing with 18 additions and 22 deletions
arch/arm/cpu/armv8/fsl-layerscape/Makefile
View file @ 4a3ab193
...@@ -22,7 +22,7 @@ obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o ...@@ -22,7 +22,7 @@ obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o
endif endif
endif endif
ifneq ($(CONFIG_LS2080A),) ifneq ($(CONFIG_ARCH_LS2080A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o
endif endif
......
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
View file @ 4a3ab193
...@@ -92,7 +92,7 @@ static inline void early_mmu_setup(void) ...@@ -92,7 +92,7 @@ static inline void early_mmu_setup(void)
static void fix_pcie_mmu_map(void) static void fix_pcie_mmu_map(void)
{ {
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
unsigned int i; unsigned int i;
u32 svr, ver; u32 svr, ver;
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
...@@ -523,7 +523,7 @@ int timer_init(void) ...@@ -523,7 +523,7 @@ int timer_init(void)
#ifdef CONFIG_FSL_LSCH3 #ifdef CONFIG_FSL_LSCH3
u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR; u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
#endif #endif
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
u32 __iomem *pctbenr = (u32 *)FSL_PMU_PCTBENR_OFFSET; u32 __iomem *pctbenr = (u32 *)FSL_PMU_PCTBENR_OFFSET;
u32 svr_dev_id; u32 svr_dev_id;
#endif #endif
...@@ -541,7 +541,7 @@ int timer_init(void) ...@@ -541,7 +541,7 @@ int timer_init(void)
out_le32(cltbenr, 0xf); out_le32(cltbenr, 0xf);
#endif #endif
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
/* /*
* In certain Layerscape SoCs, the clock for each core's * In certain Layerscape SoCs, the clock for each core's
* has an enable bit in the PMU Physical Core Time Base Enable * has an enable bit in the PMU Physical Core Time Base Enable
......
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
View file @ 4a3ab193
...@@ -76,7 +76,7 @@ ENTRY(lowlevel_init) ...@@ -76,7 +76,7 @@ ENTRY(lowlevel_init)
#ifdef CONFIG_FSL_LSCH3 #ifdef CONFIG_FSL_LSCH3
/* Set Wuo bit for RN-I 20 */ /* Set Wuo bit for RN-I 20 */
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
ldr x0, =CCI_AUX_CONTROL_BASE(20) ldr x0, =CCI_AUX_CONTROL_BASE(20)
ldr x1, =0x00000010 ldr x1, =0x00000010
bl ccn504_set_aux bl ccn504_set_aux
......
arch/arm/cpu/armv8/fsl-layerscape/spl.c
View file @ 4a3ab193
...@@ -65,7 +65,7 @@ void board_init_f(ulong dummy) ...@@ -65,7 +65,7 @@ void board_init_f(ulong dummy)
memset((void *)gd, 0, sizeof(gd_t)); memset((void *)gd, 0, sizeof(gd_t));
board_early_init_f(); board_early_init_f();
timer_init(); timer_init();
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
env_init(); env_init();
#endif #endif
get_clocks(); get_clocks();
......
arch/arm/include/asm/arch-fsl-layerscape/config.h
View file @ 4a3ab193
...@@ -18,7 +18,7 @@ ...@@ -18,7 +18,7 @@
*/ */
#define CONFIG_SYS_MEM_RESERVE_SECURE (2048 * 1024) /* 2MB */ #define CONFIG_SYS_MEM_RESERVE_SECURE (2048 * 1024) /* 2MB */
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 } #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 }
#define SRDS_MAX_LANES 8 #define SRDS_MAX_LANES 8
#define CONFIG_SYS_PAGE_SIZE 0x10000 #define CONFIG_SYS_PAGE_SIZE 0x10000
......
arch/arm/include/asm/arch-fsl-layerscape/cpu.h
View file @ 4a3ab193
...@@ -249,7 +249,7 @@ static struct mm_region final_map[] = { ...@@ -249,7 +249,7 @@ static struct mm_region final_map[] = {
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, },
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
{ CONFIG_SYS_PCIE4_PHYS_ADDR, CONFIG_SYS_PCIE4_PHYS_ADDR, { CONFIG_SYS_PCIE4_PHYS_ADDR, CONFIG_SYS_PCIE4_PHYS_ADDR,
CONFIG_SYS_PCIE4_PHYS_SIZE, CONFIG_SYS_PCIE4_PHYS_SIZE,
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
......
arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
View file @ 4a3ab193
...@@ -9,7 +9,7 @@ ...@@ -9,7 +9,7 @@
#include <config.h> #include <config.h>
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
enum srds_prtcl { enum srds_prtcl {
/* /*
* Nobody will check whether the device 'NONE' has been configured, * Nobody will check whether the device 'NONE' has been configured,
......
arch/arm/include/asm/fsl_secure_boot.h
View file @ 4a3ab193
...@@ -55,7 +55,7 @@ ...@@ -55,7 +55,7 @@
#define CONFIG_ESBC_ADDR_64BIT #define CONFIG_ESBC_ADDR_64BIT
#endif #endif
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
#define CONFIG_EXTRA_ENV \ #define CONFIG_EXTRA_ENV \
"setenv fdt_high 0xa0000000;" \ "setenv fdt_high 0xa0000000;" \
"setenv initrd_high 0xcfffffff;" \ "setenv initrd_high 0xcfffffff;" \
......
configs/ls2080a_emu_defconfig
View file @ 4a3ab193
...@@ -5,7 +5,7 @@ CONFIG_FIT=y ...@@ -5,7 +5,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="EMU,LS2080A" CONFIG_SYS_EXTRA_OPTIONS="EMU"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_CONSOLE is not set
......
configs/ls2080a_simu_defconfig
View file @ 4a3ab193
...@@ -5,7 +5,7 @@ CONFIG_FIT=y ...@@ -5,7 +5,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SIMU, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="SIMU"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
# CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_CONSOLE is not set
......
configs/ls2080aqds_SECURE_BOOT_defconfig
View file @ 4a3ab193
...@@ -7,7 +7,6 @@ CONFIG_FIT=y ...@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y CONFIG_CMD_GPT=y
......
configs/ls2080aqds_defconfig
View file @ 4a3ab193
...@@ -7,7 +7,6 @@ CONFIG_FIT=y ...@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y CONFIG_CMD_GPT=y
......
configs/ls2080aqds_nand_defconfig
View file @ 4a3ab193
...@@ -10,7 +10,7 @@ CONFIG_FIT=y ...@@ -10,7 +10,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y
......
configs/ls2080aqds_qspi_defconfig
View file @ 4a3ab193
...@@ -5,7 +5,7 @@ CONFIG_FIT=y ...@@ -5,7 +5,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT,LS2080A" CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_QSPI_BOOT=y CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
......
configs/ls2080ardb_SECURE_BOOT_defconfig
View file @ 4a3ab193
...@@ -7,7 +7,6 @@ CONFIG_FIT=y ...@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y CONFIG_CMD_GPT=y
......
configs/ls2080ardb_defconfig
View file @ 4a3ab193
...@@ -7,7 +7,6 @@ CONFIG_FIT=y ...@@ -7,7 +7,6 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LS2080A"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_CMD_GREPENV=y CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPT=y CONFIG_CMD_GPT=y
......
configs/ls2080ardb_nand_defconfig
View file @ 4a3ab193
...@@ -10,7 +10,7 @@ CONFIG_FIT=y ...@@ -10,7 +10,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A" CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10 CONFIG_BOOTDELAY=10
CONFIG_SPL=y CONFIG_SPL=y
CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y
......
drivers/crypto/fsl/jr.c
View file @ 4a3ab193
...@@ -587,7 +587,7 @@ int sec_init_idx(uint8_t sec_idx) ...@@ -587,7 +587,7 @@ int sec_init_idx(uint8_t sec_idx)
* For AXI Read - Cacheable, Read allocate * For AXI Read - Cacheable, Read allocate
* Only For LS2080a, to solve CAAM coherency issues * Only For LS2080a, to solve CAAM coherency issues
*/ */
#ifdef CONFIG_LS2080A #ifdef CONFIG_ARCH_LS2080A
mcr = (mcr & ~MCFGR_AWCACHE_MASK) | (0xb << MCFGR_AWCACHE_SHIFT); mcr = (mcr & ~MCFGR_AWCACHE_MASK) | (0xb << MCFGR_AWCACHE_SHIFT);
mcr = (mcr & ~MCFGR_ARCACHE_MASK) | (0x6 << MCFGR_ARCACHE_SHIFT); mcr = (mcr & ~MCFGR_ARCACHE_MASK) | (0x6 << MCFGR_ARCACHE_SHIFT);
#else #else
......
drivers/net/ldpaa_eth/Makefile
View file @ 4a3ab193
...@@ -6,4 +6,4 @@ ...@@ -6,4 +6,4 @@
obj-y += ldpaa_wriop.o obj-y += ldpaa_wriop.o
obj-y += ldpaa_eth.o obj-y += ldpaa_eth.o
obj-$(CONFIG_LS2080A) += ls2080a.o obj-$(CONFIG_ARCH_LS2080A) += ls2080a.o
include/linux/usb/xhci-fsl.h
View file @ 4a3ab193
...@@ -58,7 +58,7 @@ struct fsl_xhci { ...@@ -58,7 +58,7 @@ struct fsl_xhci {
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
#elif defined(CONFIG_LS2080A) #elif defined(CONFIG_ARCH_LS2080A)
#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
#define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
......
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