Commit d31f3a1b authored by Meenakshi Aggarwal's avatar Meenakshi Aggarwal Committed by Priyanka Jain
Browse files

armv8: lx2160a: fix reset sequence



Make sure that SW_RST_REQ and RST_REQ_MSK are cleared
before triggering hardware reset request.
Signed-off-by: default avatarThirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Signed-off-by: default avatarMeenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: default avatarPriyanka Jain <priyanka.jain@nxp.com>
parent e5f1111a
// SPDX-License-Identifier: GPL-2.0+ // SPDX-License-Identifier: GPL-2.0+
/* /*
* Copyright 2017-2019 NXP * Copyright 2017-2020 NXP
* Copyright 2014-2015 Freescale Semiconductor, Inc. * Copyright 2014-2015 Freescale Semiconductor, Inc.
*/ */
...@@ -1229,13 +1229,15 @@ __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR; ...@@ -1229,13 +1229,15 @@ __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR;
void __efi_runtime reset_cpu(ulong addr) void __efi_runtime reset_cpu(ulong addr)
{ {
u32 val;
#ifdef CONFIG_ARCH_LX2160A #ifdef CONFIG_ARCH_LX2160A
val = in_le32(rstcr); /* clear the RST_REQ_MSK and SW_RST_REQ */
val |= 0x01; out_le32(rstcr, 0x0);
out_le32(rstcr, val);
/* initiate the sw reset request */
out_le32(rstcr, 0x1);
#else #else
u32 val;
/* Raise RESET_REQ_B */ /* Raise RESET_REQ_B */
val = scfg_in32(rstcr); val = scfg_in32(rstcr);
val |= 0x02; val |= 0x02;
......
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