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Commit e2211743 authored by wdenk's avatar wdenk
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board/hymod/global_env 0 → 100644
View file @ e2211743
# format of this file is:
#
# 1. blank lines and lines beginning with '#' are ignored
# 2. all other lines must have the form <name>=<value>
# 3. if a percent appears anywhere, it is replaced like so:
#
# %s serial number of the main board (10 digit zero filled)
# %S serial number of the main board (plain number)
# %% a percentage character
#
# no whitespace is removed in either <name> or <value>
#
# if first character in <name> is a dash ('-'), then an existing env var
# will not be overwritten (the dash is removed).
#
# if last character in <name> is a plus ('+'), then <value> will be appended
# to any existing env var (the plus is removed). Duplicates of <value> are
# removed.
#
# set the ip address based on the main board serial number
ipaddr=192.168.1.%S
serverip=192.168.1.254
# stop auto execute after tftp
autostart=no
#
# 16M flash map, 64 x 256K sectors, mapped at address 0x40000000
#
# sector 0: boot
# sector 1: non volatile environment
# sectors 2-4: linux kernel image
# sectors 5-7: alternate linux kernel image
# sectors 8-63: linux initial ramdisk image
#
fetchboot=tftp 100000 /hymod/u-boot.bin
eraseboot=protect off 1:0 ; erase 1:0 ; protect on 1:0
copyboot=protect off 1:0 ; cp.b 100000 40000000 40000 ; protect on 1:0
cmpboot=cmp.b 100000 40000000 40000
newboot=run fetchboot eraseboot copyboot cmpboot
fetchlinux=tftp 100000 /hymod/linux.bin
eraselinux=erase 1:2-4
copylinux=cp.b 100000 40080000 $(filesize)
cmplinux=cmp.b 100000 40080000 $(filesize)
newlinux=run fetchlinux eraselinux copylinux cmplinux
fetchaltlinux=tftp 100000 /hymod/altlinux.bin
erasealtlinux=erase 1:5-7
copyaltlinux=cp.b 100000 40080000 $(filesize)
cmpaltlinux=cmp.b 100000 40080000 $(filesize)
newaltlinux=run fetchaltlinux erasealtlinux copyaltlinux cmpaltlinux
fetchird=tftp 100000 /hymod/initrd.bin
eraseird=erase 1:8-63
copyird=cp.b 100000 40200000 $(filesize)
cmpird=cmp.b 100000 40200000 $(filesize)
newinitrd=run fetchird eraseird copyird cmpird
bootcmd=bootm 40080000 40200000
-bootargs=root=/dev/ram rw
# these are for hymod linux
bootargs+=preload=unix,i2c-cpm,i2c-dev
bootargs+=serialno=%S
bootargs+=ramdisk_size=32768
bootargs+=automount nisclient nisdomain=mlb.dmt.csiro.au nissrvadr=138.194.112.4
bootdelay=2
board/lwmon/lwmon.c 0 → 100644
View file @ e2211743
This diff is collapsed.
board/musenki/README 0 → 100644
View file @ e2211743
U-Boot for a Musenki M-3/M-1 board
---------------------------
Musenki M-1 and M-3 have two banks of flash of 4MB or 8MB each.
In board's notation, bank 0 is the one at the address of 0xFF800000
and bank 1 is the one at the address of 0xFF000000.
On power-up the processor jumps to the address of 0xFFF00100, the last
megabyte of the bank 0 of flash.
Thus, U-Boot is configured to reside in flash starting at the address of
0xFFF00000. The environment space is located in flash separately from
U-Boot, at the address of 0xFF800000.
There is a Davicom 9102A on-board, but I don't have it working yet.
U-Boot test results
--------------------
x.x Operation on all available serial consoles
x.x.x CONFIG_CONS_INDEX 1
U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
Board: MUSENKI Local Bus at 100 MHz
DRAM: 32 MB
FLASH: 4 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=> help
autoscr - run script from memory
base - print or set address offset
bdinfo - print Board Info structure
bootm - boot application image from memory
bootp - boot image via network using BootP/TFTP protocol
bootd - boot default, i.e., run 'bootcmd'
cmp - memory compare
coninfo - print console devices and informations
cp - memory copy
crc32 - checksum calculation
dcache - enable or disable data cache
echo - echo args to console
erase - erase FLASH memory
flinfo - print FLASH memory information
go - start application at address 'addr'
help - print online help
icache - enable or disable instruction cache
iminfo - print header information for application image
loadb - load binary file over serial line (kermit mode)
loads - load S-Record file over serial line
loop - infinite loop on address range
md - memory display
mm - memory modify (auto-incrementing)
mtest - simple RAM test
mw - memory write (fill)
nm - memory modify (constant address)
printenv- print environment variables
protect - enable or disable FLASH write protection
rarpboot- boot image via network using RARP/TFTP protocol
reset - Perform RESET of the CPU
run - run commands in an environment variable
saveenv - save environment variables to persistent storage
setenv - set environment variables
tftpboot- boot image via network using TFTP protocol
and env variables ipaddr and serverip
version - print monitor version
? - alias for 'help'
x.x.x CONFIG_CONS_INDEX 2
**** NOT TESTED ****
x.x Flash Driver Operation
Boot 1.1.1 (Nov 20 2001 - 15:55:32)
CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
Board: MUSENKI Local Bus at 100 MHz
DRAM: 32 MB
FLASH: 4 MB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=> md ff800000
ff800000: 46989bf8 626f6f74 636d643d 626f6f74 F...bootcmd=boot
ff800010: 6d204646 38323030 30300062 6f6f7464 m FF820000.bootd
ff800020: 656c6179 3d350062 61756472 6174653d elay=5.baudrate=
ff800030: 39363030 00636c6f 636b735f 696e5f6d 9600.clocks_in_m
ff800040: 687a3d31 00737464 696e3d73 65726961 hz=1.stdin=seria
ff800050: 6c007374 646f7574 3d736572 69616c00 l.stdout=serial.
ff800060: 73746465 72723d73 65726961 6c006970 stderr=serial.ip
ff800070: 61646472 3d313932 2e313638 2e302e34 addr=192.168.0.4
ff800080: 32007365 72766572 69703d31 39322e31 2.serverip=192.1
ff800090: 36382e30 2e380000 00000000 00000000 68.0.8..........
ff8000a0: 00000000 00000000 00000000 00000000 ................
ff8000b0: 00000000 00000000 00000000 00000000 ................
ff8000c0: 00000000 00000000 00000000 00000000 ................
ff8000d0: 00000000 00000000 00000000 00000000 ................
ff8000e0: 00000000 00000000 00000000 00000000 ................
ff8000f0: 00000000 00000000 00000000 00000000 ................
=> protect off ff800000 ff81ffff
Un-Protected 1 sectors
=> erase ff800000 ff81ffff
Erase Flash from 0xff800000 to 0xff81ffff
done
Erased 1 sectors
=> md ff800000
ff800000: ffffffff ffffffff ffffffff ffffffff ................
ff800010: ffffffff ffffffff ffffffff ffffffff ................
ff800020: ffffffff ffffffff ffffffff ffffffff ................
ff800030: ffffffff ffffffff ffffffff ffffffff ................
ff800040: ffffffff ffffffff ffffffff ffffffff ................
ff800050: ffffffff ffffffff ffffffff ffffffff ................
ff800060: ffffffff ffffffff ffffffff ffffffff ................
ff800070: ffffffff ffffffff ffffffff ffffffff ................
ff800080: ffffffff ffffffff ffffffff ffffffff ................
ff800090: ffffffff ffffffff ffffffff ffffffff ................
ff8000a0: ffffffff ffffffff ffffffff ffffffff ................
ff8000b0: ffffffff ffffffff ffffffff ffffffff ................
ff8000c0: ffffffff ffffffff ffffffff ffffffff ................
ff8000d0: ffffffff ffffffff ffffffff ffffffff ................
ff8000e0: ffffffff ffffffff ffffffff ffffffff ................
ff8000f0: ffffffff ffffffff ffffffff ffffffff ................
x.x.x Information
U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
Board: MUSENKI Local Bus at 100 MHz
DRAM: 32 MB
FLASH: 4 MB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=> flinfo
Bank # 1: Intel 28F320J3A (32Mbit = 128K x 32)
Size: 4 MB in 32 Sectors
Sector Start Addresses:
FF800000 (RO) FF820000 FF840000 FF860000 FF880000
FF8A0000 FF8C0000 FF8E0000 FF900000 FF920000
FF940000 FF960000 FF980000 FF9A0000 FF9C0000
FF9E0000 FFA00000 FFA20000 FFA40000 FFA60000
FFA80000 FFAA0000 FFAC0000 FFAE0000 FFB00000
FFB20000 FFB40000 FFB60000 FFB80000 FFBA0000
FFBC0000 FFBE0000
Bank # 2: missing or unknown FLASH type
=>
x.x.x Flash Programming
U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
Board: MUSENKI Local Bus at 100 MHz
DRAM: 32 MB
FLASH: 4 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=>
=>
=>
=> protect off ff800000 ff81ffff
Un-Protected 1 sectors
=> cp 0 ff800000 20
Copy to Flash... done
=> md ff800000
ff800000: 37ce33ec 33cc334c 33c031cc 33cc35cc 7.3.3.3L3.1.3.5.
ff800010: 33ec13ce 30ccb3ec b3c833c4 31c836cc 3...0.....3.1.6.
ff800020: 33cc3b9d 31ec33ee 13ecf3cc 338833ec 3.;.1.3.....3.3.
ff800030: 234c33ec 32cc22cc 33883bdc 534433cc #L3.2.".3.;.SD3.
ff800040: 33cc30c8 31cc32ec 338c33cc 330c33dc 3.0.1.2.3.3.3.3.
ff800050: 33cc13dc 334c534c b1c433d8 128c13cc 3...3LSL..3.....
ff800060: 37ec36cd 33dc33cc bbc9f7e8 bbcc77cc 7.6.3.3.......w.
ff800070: 314c0adc 139c30ed 33cc334c 33c833ec 1L....0.3.3L3.3.
ff800080: ffffffff ffffffff ffffffff ffffffff ................
ff800090: ffffffff ffffffff ffffffff ffffffff ................
ff8000a0: ffffffff ffffffff ffffffff ffffffff ................
ff8000b0: ffffffff ffffffff ffffffff ffffffff ................
ff8000c0: ffffffff ffffffff ffffffff ffffffff ................
ff8000d0: ffffffff ffffffff ffffffff ffffffff ................
ff8000e0: ffffffff ffffffff ffffffff ffffffff ................
ff8000f0: ffffffff ffffffff ffffffff ffffffff ................
x.x.x Storage of environment variables in flash
U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
Board: MUSENKI Local Bus at 100 MHz
DRAM: 32 MB
FLASH: 4 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=> printenv
bootcmd=bootm FF820000
bootdelay=5
baudrate=9600
clocks_in_mhz=1
stdin=serial
stdout=serial
stderr=serial
Environment size: 106/16380 bytes
=> setenv myvar 1234
=> saveenv
Un-Protected 1 sectors
Erasing Flash...
done
Erased 1 sectors
Saving Environment to Flash...
Protected 1 sectors
=> reset
U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
Board: MUSENKI Local Bus at 100 MHz
DRAM: 32 MB
FLASH: 4 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=> printenv
bootcmd=bootm FF820000
bootdelay=5
baudrate=9600
clocks_in_mhz=1
myvar=1234
stdin=serial
stdout=serial
stderr=serial
Environment size: 117/16380 bytes
x.x Image Download and run over serial port
U-Boot 1.1.1 (Nov 20 2001 - 15:55:32)
CPU: MPC8245 Revision 16.20 at 250 MHz: 16 kB I-Cache 16 kB D-Cache
Board: MUSENKI Local Bus at 100 MHz
DRAM: 32 MB
FLASH: 4 MB
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=> loads
## Ready for S-Record download ...
## First Load Addr = 0x00040000
## Last Load Addr = 0x00050177
## Total Size = 0x00010178 = 65912 Bytes
## Start Addr = 0x00040004
=> go 40004
## Starting application at 0x00040004 ...
Hello World
argc = 1
argv[0] = "40004"
argv[1] = "<NULL>"
Hit any key to exit ...
## Application terminated, rc = 0x0
x.x Image download and run over ethernet interface
untested (not working yet, actually)
board/pcippc2/u-boot.lds 0 → 100644
View file @ e2211743
/*
* (C) Copyright 2001
* Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* u-boot.lds - linker script for U-Boot on the Galileo Eval Board.
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/74xx_7xx/start.o (.text)
/* store the environment in a seperate sector in the boot flash */
/* . = env_offset; */
/* common/environment.o(.text) */
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}
board/pm826/config.mk 0 → 100644
View file @ e2211743
#
# (C) Copyright 2001, 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# PM826 boards
#
# This should be equal to the CFG_FLASH_BASE or
# CFG_BOOTROM_BASE define in config_PM826.h
# for the "final" configuration, with U-Boot
# in flash, or the address in RAM where
# U-Boot is loaded at for debugging.
#
ifeq ($(CONFIG_BOOT_ROM),y)
TEXT_BASE := 0x60000000
PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
else
TEXT_BASE := 0x40000000
endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
board/rpxsuper/readme 0 → 100644
View file @ e2211743
Hi,
so this is the port to the Embedded Planet RPX Super Board.
ATTENTION
This code is only tested on the AY-Version, which is an early release with some
hardware bugs. The main problem is that this board uses the default Hard Reset
Configuration Word and not the 4 bytes located at start of FLASH because at
0xFE000000 is no FLASH. The FLASH consists out of 4 chips each 16bits wide. Be
carefull, the bytes are swapped. So DQ0-7 is the high byte, DQ8-15 ist the low
byte.
The icache can only manually be enabled after reset.
The FLASH and main SDRAM is working with icache enabled.
The local SDRAM can only be used as data memory when icache is enabled.
If U-Boot runs in local SDRAM, TFTP does not work.
The functions in mii_phy.c are all working. Call mii_phy_discover() out of
eth_init() and solve the linker error.
I2C, RTC/NVRAM and PCMCIA are not working yet.
TODO
The 32MB local SDRAM is working but not shown in the startup messages of
U-Boot. If you locate U-Boot or any other program to this area it won't run.
Turning the ichache off does not solve this problem.
As I won't buy another RPX Super there might be some little work to do for you
getting this U-Boot port running on the final board.
frank.morauf@salzbrenner.com
board/siemens/SCM/config.mk 0 → 100644
View file @ e2211743
#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# Siemens SCM boards
#
# This should be equal to the CFG_FLASH_BASE define in config_SCM.h
# for the "final" configuration, with U-Boot in flash, or the address
# in RAM where U-Boot is loaded at for debugging.
#
TEXT_BASE = 0x40000000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
board/tqm8260/config.mk 0 → 100644
View file @ e2211743
#
# (C) Copyright 2001
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# TQM8260 boards
#
# This should be equal to the CFG_FLASH_BASE define in config_TQM8260.h
# for the "final" configuration, with U-Boot in flash, or the address
# in RAM where U-Boot is loaded at for debugging.
#
TEXT_BASE = 0x40000000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
common/fpga.c 0 → 100644
View file @ e2211743
/*
* (C) Copyright 2002
* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
/*
* Generic FPGA support
*/
#include <common.h> /* core U-Boot definitions */
#include <xilinx.h> /* xilinx specific definitions */
#include <altera.h> /* altera specific definitions */
#if defined(CONFIG_FPGA)
#if 0
#define FPGA_DEBUG /* define FPGA_DEBUG to get debug messages */
#endif
/* Local definitions */
#ifndef CONFIG_MAX_FPGA_DEVICES
#define CONFIG_MAX_FPGA_DEVICES 5
#endif
/* Enable/Disable debug console messages */
#ifdef FPGA_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
#else
#define PRINTF(fmt,args...)
#endif
/* Local static data */
static ulong relocation_offset = 0;
static int next_desc = FPGA_INVALID_DEVICE;
static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];
/* Local static functions */
static const fpga_desc * const fpga_get_desc( int devnum );
static const fpga_desc * const fpga_validate( int devnum, void *buf,
size_t bsize, char *fn );
static int fpga_dev_info( int devnum );
/* ------------------------------------------------------------------------- */
/* fpga_no_sup
* 'no support' message function
*/
static void fpga_no_sup( char *fn, char *msg )
{
if ( fn && msg ) {
printf( "%s: No support for %s. CONFIG_FPGA defined as 0x%x.\n",
fn, msg, CONFIG_FPGA );
} else if ( msg ) {
printf( "No support for %s. CONFIG_FPGA defined as 0x%x.\n",
msg, CONFIG_FPGA );
} else {
printf( "No FPGA suport! CONFIG_FPGA defined as 0x%x.\n",
CONFIG_FPGA );
}
}
/* fpga_get_desc
* map a device number to a descriptor
*/
static const fpga_desc * const fpga_get_desc( int devnum )
{
fpga_desc *desc = (fpga_desc * )NULL;
if (( devnum >= 0 ) && (devnum < next_desc )) {
desc = &desc_table[devnum];
PRINTF( "%s: found fpga descriptor #%d @ 0x%p\n",
__FUNCTION__, devnum, desc );
}
return desc;
}
/* fpga_validate
* generic parameter checking code
*/
static const fpga_desc * const fpga_validate( int devnum, void *buf,
size_t bsize, char *fn )
{
const fpga_desc * const desc = fpga_get_desc( devnum );
if ( !desc ) {
printf( "%s: Invalid device number %d\n", fn, devnum );
}
if ( !buf ) {
printf( "%s: Null buffer.\n", fn );
return (fpga_desc * const)NULL;
}
if ( !bsize ) {
printf( "%s: Null buffer size.\n", fn );
return (fpga_desc * const)NULL;
}
return desc;
}
/* fpga_dev_info
* generic multiplexing code
*/
static int fpga_dev_info( int devnum )
{
int ret_val = FPGA_FAIL; /* assume failure */
const fpga_desc * const desc = fpga_get_desc( devnum );
if ( desc ) {
PRINTF( "%s: Device Descriptor @ 0x%p\n",
__FUNCTION__, desc->devdesc );
switch ( desc->devtype ) {
case fpga_xilinx:
#if CONFIG_FPGA & CFG_FPGA_XILINX
printf( "Xilinx Device\nDescriptor @ 0x%p\n", desc );
ret_val = xilinx_info( desc->devdesc );
#else
fpga_no_sup( __FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
#if CONFIG_FPGA & CFG_FPGA_ALTERA
printf( "Altera Device\nDescriptor @ 0x%p\n", desc );
ret_val = altera_info( desc->devdesc );
#else
fpga_no_sup( __FUNCTION__, "Altera devices" );
#endif
break;
default:
printf( "%s: Invalid or unsupported device type %d\n",
__FUNCTION__, desc->devtype );
}
} else {
printf( "%s: Invalid device number %d\n",
__FUNCTION__, devnum );
}
return ret_val;
}
/* fpga_reloc
* generic multiplexing code
*/
int fpga_reloc( fpga_type devtype, void *desc, ulong reloc_off )
{
int ret_val = FPGA_FAIL;
PRINTF( "%s: Relocating Device of type %d @ 0x%p with offset %lx\n",
__FUNCTION__, devtype, desc, reloc_off );
switch ( devtype ) {
case fpga_xilinx:
#if CONFIG_FPGA & CFG_FPGA_XILINX
ret_val = xilinx_reloc( desc, reloc_off );
#else
fpga_no_sup( __FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
#if CONFIG_FPGA & CFG_FPGA_ALTERA
ret_val = altera_reloc( desc, reloc_off );
#else
fpga_no_sup( __FUNCTION__, "Altera devices" );
#endif
break;
default:
printf( "%s: Invalid or unsupported device type %d\n",
__FUNCTION__, devtype );
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
/* fgpa_init is usually called from misc_init_r() and MUST be called
* before any of the other fpga functions are used.
*/
void fpga_init( ulong reloc_off )
{
relocation_offset = reloc_off;
next_desc = 0;
memset( desc_table, 0, sizeof(desc_table));
PRINTF( "%s: CONFIG_FPGA = 0x%x\n", __FUNCTION__, CONFIG_FPGA );
#if 0
PRINTF( "%s: CFG_FPGA_XILINX = 0x%x\n", __FUNCTION__, CFG_FPGA_XILINX );
PRINTF( "%s: CFG_FPGA_ALTERA = 0x%x\n", __FUNCTION__, CFG_FPGA_ALTERA );
#endif
}
/* fpga_count
* Basic interface function to get the current number of devices available.
*/
const int fpga_count( void )
{
return next_desc;
}
/* fpga_add
* Attempts to relocate the device/board specific interface code
* to the proper RAM locations and adds the device descriptor to
* the device table.
*/
int fpga_add( fpga_type devtype, void *desc )
{
int devnum = FPGA_INVALID_DEVICE;
if ( next_desc < 0 ) {
printf( "%s: FPGA support not initialized!\n", __FUNCTION__ );
} else if (( devtype > fpga_min_type ) && ( devtype < fpga_undefined )) {
if ( desc ) {
if ( next_desc < CONFIG_MAX_FPGA_DEVICES ) {
if ( fpga_reloc( devtype, desc, relocation_offset )
== FPGA_SUCCESS ) {
devnum = next_desc;
desc_table[next_desc].devtype = devtype;
desc_table[next_desc++].devdesc = desc;
} else {
printf( "%s: Unable to relocate device interface table!\n",
__FUNCTION__ );
}
} else {
printf( "%s: Exceeded Max FPGA device count\n", __FUNCTION__ );
}
} else {
printf( "%s: NULL device descriptor\n", __FUNCTION__ );
}
} else {
printf( "%s: Unsupported FPGA type %d\n", __FUNCTION__, devtype );
}
return devnum;
}
/*
* Generic multiplexing code
*/
int fpga_load( int devnum, void *buf, size_t bsize )
{
int ret_val = FPGA_FAIL; /* assume failure */
const fpga_desc * const desc = fpga_validate( devnum, buf, bsize, __FUNCTION__ );
if ( desc ) {
switch ( desc->devtype ) {
case fpga_xilinx:
#if CONFIG_FPGA & CFG_FPGA_XILINX
ret_val = xilinx_load( desc->devdesc, buf, bsize );
#else
fpga_no_sup( __FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
#if CONFIG_FPGA & CFG_FPGA_ALTERA
ret_val = altera_load( desc->devdesc, buf, bsize );
#else
fpga_no_sup( __FUNCTION__, "Altera devices" );
#endif
break;
default:
printf( "%s: Invalid or unsupported device type %d\n",
__FUNCTION__, desc->devtype );
}
}
return ret_val;
}
/* fpga_dump
* generic multiplexing code
*/
int fpga_dump( int devnum, void *buf, size_t bsize )
{
int ret_val = FPGA_FAIL; /* assume failure */
const fpga_desc * const desc = fpga_validate( devnum, buf, bsize, __FUNCTION__ );
if ( desc ) {
switch ( desc->devtype ) {
case fpga_xilinx:
#if CONFIG_FPGA & CFG_FPGA_XILINX
ret_val = xilinx_dump( desc->devdesc, buf, bsize );
#else
fpga_no_sup( __FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
#if CONFIG_FPGA & CFG_FPGA_ALTERA
ret_val = altera_dump( desc->devdesc, buf, bsize );
#else
fpga_no_sup( __FUNCTION__, "Altera devices" );
#endif
break;
default:
printf( "%s: Invalid or unsupported device type %d\n",
__FUNCTION__, desc->devtype );
}
}
return ret_val;
}
/* fpga_info
* front end to fpga_dev_info. If devnum is invalid, report on all
* available devices.
*/
int fpga_info( int devnum )
{
if ( devnum == FPGA_INVALID_DEVICE ) {
if ( next_desc > 0 ) {
int dev;
for ( dev = 0; dev < next_desc; dev++ ) {
fpga_dev_info( dev );
}
return FPGA_SUCCESS;
} else {
printf( "%s: No FPGA devices available.\n", __FUNCTION__ );
return FPGA_FAIL;
}
}
else return fpga_dev_info( devnum );
}
/* ------------------------------------------------------------------------- */
#endif /* CONFIG_FPGA */
common/spartan2.c 0 → 100644
View file @ e2211743
/*
* (C) Copyright 2002
* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h> /* core U-Boot definitions */
#include <spartan2.h> /* Spartan-II device family */
#if (CONFIG_FPGA & (CFG_XILINX | CFG_SPARTAN2))
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
#else
#define PRINTF(fmt,args...)
#endif
#undef CFG_FPGA_CHECK_BUSY
#define CFG_FPGA_PROG_FEEDBACK
/* Note: The assumption is that we cannot possibly run fast enough to
* overrun the device (the Slave Parallel mode can free run at 50MHz).
* If there is a need to operate slower, define CONFIG_FPGA_DELAY in
* the board config file to slow things down.
*/
#ifndef CONFIG_FPGA_DELAY
#define CONFIG_FPGA_DELAY()
#endif
#ifndef CFG_FPGA_WAIT
#define CFG_FPGA_WAIT 10
#endif
static int Spartan2_sp_load( Xilinx_desc *desc, void *buf, size_t bsize );
static int Spartan2_sp_dump( Xilinx_desc *desc, void *buf, size_t bsize );
/* static int Spartan2_sp_info( Xilinx_desc *desc ); */
static int Spartan2_sp_reloc( Xilinx_desc *desc, ulong reloc_offset );
static int Spartan2_ss_load( Xilinx_desc *desc, void *buf, size_t bsize );
static int Spartan2_ss_dump( Xilinx_desc *desc, void *buf, size_t bsize );
/* static int Spartan2_ss_info( Xilinx_desc *desc ); */
static int Spartan2_ss_reloc( Xilinx_desc *desc, ulong reloc_offset );
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
int Spartan2_load (Xilinx_desc * desc, void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
ret_val = Spartan2_ss_load (desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
ret_val = Spartan2_sp_load (desc, buf, bsize);
break;
default:
printf ("%s: Unsupported interface type, %d\n",
__FUNCTION__, desc->iface);
}
return ret_val;
}
int Spartan2_dump (Xilinx_desc * desc, void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
ret_val = Spartan2_ss_dump (desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
ret_val = Spartan2_sp_dump (desc, buf, bsize);
break;
default:
printf ("%s: Unsupported interface type, %d\n",
__FUNCTION__, desc->iface);
}
return ret_val;
}
int Spartan2_info( Xilinx_desc *desc )
{
return FPGA_SUCCESS;
}
int Spartan2_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume a failure */
if (desc->family != Xilinx_Spartan2) {
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
return FPGA_FAIL;
} else
switch (desc->iface) {
case slave_serial:
ret_val = Spartan2_ss_reloc (desc, reloc_offset);
break;
case slave_parallel:
ret_val = Spartan2_sp_reloc (desc, reloc_offset);
break;
default:
printf ("%s: Unsupported interface type, %d\n",
__FUNCTION__, desc->iface);
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
/* Spartan-II Slave Parallel Generic Implementation */
static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
PRINTF ("%s: start with interface functions @ 0x%p\n",
__FUNCTION__, fn);
if (fn) {
size_t bytecount = 0;
unsigned char *data = (unsigned char *) buf;
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
PRINTF ("%s: Function Table:\n"
"ptr:\t0x%p\n"
"struct: 0x%p\n"
"pre: 0x%p\n"
"pgm:\t0x%p\n"
"init:\t0x%p\n"
"err:\t0x%p\n"
"clk:\t0x%p\n"
"cs:\t0x%p\n"
"wr:\t0x%p\n"
"read data:\t0x%p\n"
"write data:\t0x%p\n"
"busy:\t0x%p\n"
"abort:\t0x%p\n",
"post:\t0x%p\n\n",
__FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
fn->abort, fn->post);
/*
* This code is designed to emulate the "Express Style"
* Continuous Data Loading in Slave Parallel Mode for
* the Spartan-II Family.
*/
#ifdef CFG_FPGA_PROG_FEEDBACK
printf ("Loading FPGA Device %d...\n", cookie);
#endif
/*
* Run the pre configuration function if there is one.
*/
if (*fn->pre) {
(*fn->pre) (cookie);
}
/* Establish the initial state */
(*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
/* Get ready for the burn */
CONFIG_FPGA_DELAY ();
(*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
ts = get_timer (0); /* get current time */
/* Now wait for INIT and BUSY to go high */
do {
CONFIG_FPGA_DELAY ();
if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */
puts ("** Timeout waiting for INIT to clear.\n");
(*fn->abort) (cookie); /* abort the burn */
return FPGA_FAIL;
}
} while ((*fn->init) (cookie) && (*fn->busy) (cookie));
(*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */
(*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
(*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
/* Load the data */
while (bytecount < bsize) {
/* XXX - do we check for an Ctrl-C press in here ??? */
/* XXX - Check the error bit? */
(*fn->wdata) (data[bytecount++], TRUE, cookie); /* write the data */
CONFIG_FPGA_DELAY ();
(*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
(*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
#ifdef CFG_FPGA_CHECK_BUSY
ts = get_timer (0); /* get current time */
while ((*fn->busy) (cookie)) {
/* XXX - we should have a check in here somewhere to
* make sure we aren't busy forever... */
CONFIG_FPGA_DELAY ();
(*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
(*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */
puts ("** Timeout waiting for BUSY to clear.\n");
(*fn->abort) (cookie); /* abort the burn */
return FPGA_FAIL;
}
}
#endif
#ifdef CFG_FPGA_PROG_FEEDBACK
if (bytecount % (bsize / 40) == 0)
putc ('.'); /* let them know we are alive */
#endif
}
CONFIG_FPGA_DELAY ();
(*fn->cs) (FALSE, TRUE, cookie); /* Deassert the chip select */
(*fn->wr) (FALSE, TRUE, cookie); /* Deassert the write pin */
#ifdef CFG_FPGA_PROG_FEEDBACK
putc ('\n'); /* terminate the dotted line */
#endif
/* now check for done signal */
ts = get_timer (0); /* get current time */
ret_val = FPGA_SUCCESS;
while ((*fn->done) (cookie) == FPGA_FAIL) {
/* XXX - we should have a check in here somewhere to
* make sure we aren't busy forever... */
CONFIG_FPGA_DELAY ();
(*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
CONFIG_FPGA_DELAY ();
(*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */
puts ("** Timeout waiting for DONE to clear.\n");
(*fn->abort) (cookie); /* abort the burn */
ret_val = FPGA_FAIL;
break;
}
}
if (ret_val == FPGA_SUCCESS) {
#ifdef CFG_FPGA_PROG_FEEDBACK
puts ("Done.\n");
#endif
}
/*
* Run the post configuration function if there is one.
*/
if (*fn->post) {
(*fn->post) (cookie);
}
else {
#ifdef CFG_FPGA_PROG_FEEDBACK
puts ("Fail.\n");
#endif
}
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}
static int Spartan2_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
if (fn) {
unsigned char *data = (unsigned char *) buf;
size_t bytecount = 0;
int cookie = desc->cookie; /* make a local copy */
printf ("Starting Dump of FPGA Device %d...\n", cookie);
(*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
(*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
/* dump the data */
while (bytecount < bsize) {
/* XXX - do we check for an Ctrl-C press in here ??? */
(*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
(*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
(*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
#ifdef CFG_FPGA_PROG_FEEDBACK
if (bytecount % (bsize / 40) == 0)
putc ('.'); /* let them know we are alive */
#endif
}
(*fn->cs) (FALSE, FALSE, cookie); /* Deassert the chip select */
(*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
(*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
#ifdef CFG_FPGA_PROG_FEEDBACK
putc ('\n'); /* terminate the dotted line */
#endif
puts ("Done.\n");
/* XXX - checksum the data? */
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}
static int Spartan2_sp_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Parallel_fns *fn_r, *fn =
(Xilinx_Spartan2_Slave_Parallel_fns *) (desc->iface_fns);
if (fn) {
ulong addr;
/* Get the relocated table address */
addr = (ulong) fn + reloc_offset;
fn_r = (Xilinx_Spartan2_Slave_Parallel_fns *) addr;
if (!fn_r->relocated) {
if (memcmp (fn_r, fn,
sizeof (Xilinx_Spartan2_Slave_Parallel_fns))
== 0) {
/* good copy of the table, fix the descriptor pointer */
desc->iface_fns = fn_r;
} else {
PRINTF ("%s: Invalid function table at 0x%p\n",
__FUNCTION__, fn_r);
return FPGA_FAIL;
}
PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
desc);
addr = (ulong) (fn->pre) + reloc_offset;
fn_r->pre = (Xilinx_pre_fn) addr;
addr = (ulong) (fn->pgm) + reloc_offset;
fn_r->pgm = (Xilinx_pgm_fn) addr;
addr = (ulong) (fn->init) + reloc_offset;
fn_r->init = (Xilinx_init_fn) addr;
addr = (ulong) (fn->done) + reloc_offset;
fn_r->done = (Xilinx_done_fn) addr;
addr = (ulong) (fn->clk) + reloc_offset;
fn_r->clk = (Xilinx_clk_fn) addr;
addr = (ulong) (fn->err) + reloc_offset;
fn_r->err = (Xilinx_err_fn) addr;
addr = (ulong) (fn->cs) + reloc_offset;
fn_r->cs = (Xilinx_cs_fn) addr;
addr = (ulong) (fn->wr) + reloc_offset;
fn_r->wr = (Xilinx_wr_fn) addr;
addr = (ulong) (fn->rdata) + reloc_offset;
fn_r->rdata = (Xilinx_rdata_fn) addr;
addr = (ulong) (fn->wdata) + reloc_offset;
fn_r->wdata = (Xilinx_wdata_fn) addr;
addr = (ulong) (fn->busy) + reloc_offset;
fn_r->busy = (Xilinx_busy_fn) addr;
addr = (ulong) (fn->abort) + reloc_offset;
fn_r->abort = (Xilinx_abort_fn) addr;
addr = (ulong) (fn->post) + reloc_offset;
fn_r->post = (Xilinx_post_fn) addr;
fn_r->relocated = TRUE;
} else {
/* this table has already been moved */
/* XXX - should check to see if the descriptor is correct */
desc->iface_fns = fn_r;
}
ret_val = FPGA_SUCCESS;
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
{
printf ("%s: Slave Serial Loading is still unsupported\n",
__FUNCTION__);
return FPGA_FAIL;
}
static int Spartan2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
{
printf ("%s: Slave Serial Dumping is still unsupported\n",
__FUNCTION__);
return FPGA_FAIL;
}
static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Serial_fns *fn =
(Xilinx_Spartan2_Slave_Serial_fns *) (desc->iface_fns);
if (fn) {
printf ("%s: Slave Serial Loading is still unsupported\n",
__FUNCTION__);
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}
#endif
config.mk 0 → 100644
View file @ e2211743
#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#########################################################################
#
# When cross-compiling on NetBSD, we have to define __PPC__ or else we
# will pick up a va_list declaration that is incompatible with the
# actual argument lists emitted by the compiler.
#
# [Tested on NetBSD/i386 1.5 + cross-powerpc-netbsd-1.3]
ifeq ($(ARCH),ppc)
ifeq ($(CROSS_COMPILE),powerpc-netbsd-)
PLATFORM_CPPFLAGS+= -D__PPC__
endif
ifeq ($(CROSS_COMPILE),powerpc-openbsd-)
PLATFORM_CPPFLAGS+= -D__PPC__
endif
endif
ifeq ($(ARCH),arm)
ifeq ($(CROSS_COMPILE),powerpc-netbsd-)
PLATFORM_CPPFLAGS+= -D__ARM__
endif
ifeq ($(CROSS_COMPILE),powerpc-openbsd-)
PLATFORM_CPPFLAGS+= -D__ARM__
endif
endif
ifdef ARCH
sinclude $(TOPDIR)/$(ARCH)_config.mk # include architecture dependend rules
endif
ifdef CPU
sinclude $(TOPDIR)/cpu/$(CPU)/config.mk # include CPU specific rules
endif
ifdef VENDOR
BOARDDIR = $(VENDOR)/$(BOARD)
else
BOARDDIR = $(BOARD)
endif
ifdef BOARD
sinclude $(TOPDIR)/board/$(BOARDDIR)/config.mk # include board specific rules
endif
#########################################################################
CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
else if [ -x /bin/bash ]; then echo /bin/bash; \
else echo sh; fi ; fi)
ifeq ($(HOSTOS)-$(HOSTARCH),darwin-ppc)
HOSTCC = cc
else
HOSTCC = gcc
endif
HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer
HOSTSTRIP = strip
#########################################################################
#
# Include the make variables (CC, etc...)
#
AS = $(CROSS_COMPILE)as
LD = $(CROSS_COMPILE)ld
CC = $(CROSS_COMPILE)gcc
CPP = $(CC) -E
AR = $(CROSS_COMPILE)ar
NM = $(CROSS_COMPILE)nm
STRIP = $(CROSS_COMPILE)strip
OBJCOPY = $(CROSS_COMPILE)objcopy
OBJDUMP = $(CROSS_COMPILE)objdump
RANLIB = $(CROSS_COMPILE)RANLIB
RELFLAGS= $(PLATFORM_RELFLAGS)
DBGFLAGS= -g #-DDEBUG
OPTFLAGS= -Os #-fomit-frame-pointer
#LDSCRIPT := board/$(BOARDDIR)/u-boot.lds.debug
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
OBJCFLAGS := --gap-fill=0xff
CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \
-D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \
-I$(TOPDIR)/include \
-fno-builtin \
-pipe $(PLATFORM_CPPFLAGS)
ifdef BUILD_TAG
CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes \
-DBUILD_TAG='"$(BUILD_TAG)"'
else
CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes
endif
AFLAGS_DEBUG := -Wa,-gstabs
AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS)
LDFLAGS += -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE)
# Location of a usable BFD library, where we define "usable" as
# "built for ${HOST}, supports ${TARGET}". Sensible values are
# - When cross-compiling: the root of the cross-environment
# - Linux/ppc (native): /usr
# - NetBSD/ppc (native): you lose ... (must extract these from the
# binutils build directory, plus the native and U-Boot include
# files don't like each other)
#
# So far, this is used only by tools/gdb/Makefile.
ifeq ($(HOSTOS)-$(HOSTARCH),darwin-ppc)
BFD_ROOT_DIR = /usr/local/tools
else
#BFD_ROOT_DIR = /LinuxPPC/CDK # Linux/i386
#BFD_ROOT_DIR = /usr/pkg/cross # NetBSD/i386
#BFD_ROOT_DIR = /usr # native
BFD_ROOT_DIR = /opt/powerpc
endif
#########################################################################
export CONFIG_SHELL HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \
AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP \
MAKE
export TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS
#########################################################################
%.s: %.S
$(CPP) $(AFLAGS) -o $@ $(CURDIR)/$<
%.o: %.S
$(CC) $(AFLAGS) -c -o $@ $(CURDIR)/$<
%.o: %.c
$(CC) $(CFLAGS) -c -o $@ $<
#########################################################################
cpu/mpc824x/drivers/epic/epic.h 0 → 100644
View file @ e2211743
/*********************************************************************
* mpc8240epic.h - EPIC module of the MPC8240 micro-controller
*
* Copyrigh 1999 Motorola Inc.
*
* Modification History:
* =====================
* 01a,04Feb99,My Created.
* 15Nov200, robt -modified to use in U-Boot
*
*/
#ifndef __INCEPICh
#define __INCEPICh
#define ULONG unsigned long
#define MAXVEC 20
#define MAXIRQ 5 /* IRQs */
#define EPIC_DIRECT_IRQ 0 /* Direct interrupt type */
/* EPIC register addresses */
#define EPIC_EUMBBAR 0x40000 /* EUMBBAR of EPIC */
#define EPIC_FEATURES_REG (EPIC_EUMBBAR + 0x01000)/* Feature reporting */
#define EPIC_GLOBAL_REG (EPIC_EUMBBAR + 0x01020)/* Global config. */
#define EPIC_INT_CONF_REG (EPIC_EUMBBAR + 0x01030)/* Interrupt config. */
#define EPIC_VENDOR_ID_REG (EPIC_EUMBBAR + 0x01080)/* Vendor id */
#define EPIC_PROC_INIT_REG (EPIC_EUMBBAR + 0x01090)/* Processor init. */
#define EPIC_SPUR_VEC_REG (EPIC_EUMBBAR + 0x010e0)/* Spurious vector */
#define EPIC_TM_FREQ_REG (EPIC_EUMBBAR + 0x010f0)/* Timer Frequency */
#define EPIC_TM0_CUR_COUNT_REG (EPIC_EUMBBAR + 0x01100)/* Gbl TM0 Cur. Count*/
#define EPIC_TM0_BASE_COUNT_REG (EPIC_EUMBBAR + 0x01110)/* Gbl TM0 Base Count*/
#define EPIC_TM0_VEC_REG (EPIC_EUMBBAR + 0x01120)/* Gbl TM0 Vector Pri*/
#define EPIC_TM0_DES_REG (EPIC_EUMBBAR + 0x01130)/* Gbl TM0 Dest. */
#define EPIC_TM1_CUR_COUNT_REG (EPIC_EUMBBAR + 0x01140)/* Gbl TM1 Cur. Count*/
#define EPIC_TM1_BASE_COUNT_REG (EPIC_EUMBBAR + 0x01150)/* Gbl TM1 Base Count*/
#define EPIC_TM1_VEC_REG (EPIC_EUMBBAR + 0x01160)/* Gbl TM1 Vector Pri*/
#define EPIC_TM1_DES_REG (EPIC_EUMBBAR + 0x01170)/* Gbl TM1 Dest. */
#define EPIC_TM2_CUR_COUNT_REG (EPIC_EUMBBAR + 0x01180)/* Gbl TM2 Cur. Count*/
#define EPIC_TM2_BASE_COUNT_REG (EPIC_EUMBBAR + 0x01190)/* Gbl TM2 Base Count*/
#define EPIC_TM2_VEC_REG (EPIC_EUMBBAR + 0x011a0)/* Gbl TM2 Vector Pri*/
#define EPIC_TM2_DES_REG (EPIC_EUMBBAR + 0x011b0)/* Gbl TM2 Dest */
#define EPIC_TM3_CUR_COUNT_REG (EPIC_EUMBBAR + 0x011c0)/* Gbl TM3 Cur. Count*/
#define EPIC_TM3_BASE_COUNT_REG (EPIC_EUMBBAR + 0x011d0)/* Gbl TM3 Base Count*/
#define EPIC_TM3_VEC_REG (EPIC_EUMBBAR + 0x011e0)/* Gbl TM3 Vector Pri*/
#define EPIC_TM3_DES_REG (EPIC_EUMBBAR + 0x011f0)/* Gbl TM3 Dest. */
#define EPIC_EX_INT0_VEC_REG (EPIC_EUMBBAR + 0x10200)/* Ext. Int. Sr0 Des */
#define EPIC_EX_INT0_DES_REG (EPIC_EUMBBAR + 0x10210)/* Ext. Int. Sr0 Vect*/
#define EPIC_EX_INT1_VEC_REG (EPIC_EUMBBAR + 0x10220)/* Ext. Int. Sr1 Des */
#define EPIC_EX_INT1_DES_REG (EPIC_EUMBBAR + 0x10230)/* Ext. Int. Sr1 Vect*/
#define EPIC_EX_INT2_VEC_REG (EPIC_EUMBBAR + 0x10240)/* Ext. Int. Sr2 Des */
#define EPIC_EX_INT2_DES_REG (EPIC_EUMBBAR + 0x10250)/* Ext. Int. Sr2 Vect*/
#define EPIC_EX_INT3_VEC_REG (EPIC_EUMBBAR + 0x10260)/* Ext. Int. Sr3 Des */
#define EPIC_EX_INT3_DES_REG (EPIC_EUMBBAR + 0x10270)/* Ext. Int. Sr3 Vect*/
#define EPIC_EX_INT4_VEC_REG (EPIC_EUMBBAR + 0x10280)/* Ext. Int. Sr4 Des */
#define EPIC_EX_INT4_DES_REG (EPIC_EUMBBAR + 0x10290)/* Ext. Int. Sr4 Vect*/
#define EPIC_SR_INT0_VEC_REG (EPIC_EUMBBAR + 0x10200)/* Sr. Int. Sr0 Des */
#define EPIC_SR_INT0_DES_REG (EPIC_EUMBBAR + 0x10210)/* Sr. Int. Sr0 Vect */
#define EPIC_SR_INT1_VEC_REG (EPIC_EUMBBAR + 0x10220)/* Sr. Int. Sr1 Des */
#define EPIC_SR_INT1_DES_REG (EPIC_EUMBBAR + 0x10230)/* Sr. Int. Sr1 Vect.*/
#define EPIC_SR_INT2_VEC_REG (EPIC_EUMBBAR + 0x10240)/* Sr. Int. Sr2 Des */
#define EPIC_SR_INT2_DES_REG (EPIC_EUMBBAR + 0x10250)/* Sr. Int. Sr2 Vect.*/
#define EPIC_SR_INT3_VEC_REG (EPIC_EUMBBAR + 0x10260)/* Sr. Int. Sr3 Des */
#define EPIC_SR_INT3_DES_REG (EPIC_EUMBBAR + 0x10270)/* Sr. Int. Sr3 Vect.*/
#define EPIC_SR_INT4_VEC_REG (EPIC_EUMBBAR + 0x10280)/* Sr. Int. Sr4 Des */
#define EPIC_SR_INT4_DES_REG (EPIC_EUMBBAR + 0x10290)/* Sr. Int. Sr4 Vect.*/
#define EPIC_SR_INT5_VEC_REG (EPIC_EUMBBAR + 0x102a0)/* Sr. Int. Sr5 Des */
#define EPIC_SR_INT5_DES_REG (EPIC_EUMBBAR + 0x102b0)/* Sr. Int. Sr5 Vect.*/
#define EPIC_SR_INT6_VEC_REG (EPIC_EUMBBAR + 0x102c0)/* Sr. Int. Sr6 Des */
#define EPIC_SR_INT6_DES_REG (EPIC_EUMBBAR + 0x102d0)/* Sr. Int. Sr6 Vect.*/
#define EPIC_SR_INT7_VEC_REG (EPIC_EUMBBAR + 0x102e0)/* Sr. Int. Sr7 Des */
#define EPIC_SR_INT7_DES_REG (EPIC_EUMBBAR + 0x102f0)/* Sr. Int. Sr7 Vect.*/
#define EPIC_SR_INT8_VEC_REG (EPIC_EUMBBAR + 0x10300)/* Sr. Int. Sr8 Des */
#define EPIC_SR_INT8_DES_REG (EPIC_EUMBBAR + 0x10310)/* Sr. Int. Sr8 Vect.*/
#define EPIC_SR_INT9_VEC_REG (EPIC_EUMBBAR + 0x10320)/* Sr. Int. Sr9 Des */
#define EPIC_SR_INT9_DES_REG (EPIC_EUMBBAR + 0x10330)/* Sr. Int. Sr9 Vect.*/
#define EPIC_SR_INT10_VEC_REG (EPIC_EUMBBAR + 0x10340)/* Sr. Int. Sr10 Des */
#define EPIC_SR_INT10_DES_REG (EPIC_EUMBBAR + 0x10350)/* Sr. Int. Sr10 Vect*/
#define EPIC_SR_INT11_VEC_REG (EPIC_EUMBBAR + 0x10360)/* Sr. Int. Sr11 Des */
#define EPIC_SR_INT11_DES_REG (EPIC_EUMBBAR + 0x10370)/* Sr. Int. Sr11 Vect*/
#define EPIC_SR_INT12_VEC_REG (EPIC_EUMBBAR + 0x10380)/* Sr. Int. Sr12 Des */
#define EPIC_SR_INT12_DES_REG (EPIC_EUMBBAR + 0x10390)/* Sr. Int. Sr12 Vect*/
#define EPIC_SR_INT13_VEC_REG (EPIC_EUMBBAR + 0x103a0)/* Sr. Int. Sr13 Des */
#define EPIC_SR_INT13_DES_REG (EPIC_EUMBBAR + 0x103b0)/* Sr. Int. Sr13 Vect*/
#define EPIC_SR_INT14_VEC_REG (EPIC_EUMBBAR + 0x103c0)/* Sr. Int. Sr14 Des */
#define EPIC_SR_INT14_DES_REG (EPIC_EUMBBAR + 0x103d0)/* Sr. Int. Sr14 Vect*/
#define EPIC_SR_INT15_VEC_REG (EPIC_EUMBBAR + 0x103e0)/* Sr. Int. Sr15 Des */
#define EPIC_SR_INT15_DES_REG (EPIC_EUMBBAR + 0x103f0)/* Sr. Int. Sr15 Vect*/
#define EPIC_I2C_INT_VEC_REG (EPIC_EUMBBAR + 0x11020)/* I2C Int. Vect Pri.*/
#define EPIC_I2C_INT_DES_REG (EPIC_EUMBBAR + 0x11030)/* I2C Int. Dest */
#define EPIC_DMA0_INT_VEC_REG (EPIC_EUMBBAR + 0x11040)/* DMA0 Int. Vect Pri*/
#define EPIC_DMA0_INT_DES_REG (EPIC_EUMBBAR + 0x11050)/* DMA0 Int. Dest */
#define EPIC_DMA1_INT_VEC_REG (EPIC_EUMBBAR + 0x11060)/* DMA1 Int. Vect Pri*/
#define EPIC_DMA1_INT_DES_REG (EPIC_EUMBBAR + 0x11070)/* DMA1 Int. Dest */
#define EPIC_MSG_INT_VEC_REG (EPIC_EUMBBAR + 0x110c0)/* Msg Int. Vect Pri*/
#define EPIC_MSG_INT_DES_REG (EPIC_EUMBBAR + 0x110d0)/* Msg Int. Dest */
#define EPIC_PROC_CTASK_PRI_REG (EPIC_EUMBBAR + 0x20080)/* Proc. current task*/
#define EPIC_PROC_INT_ACK_REG (EPIC_EUMBBAR + 0x200a0)/* Int. acknowledge */
#define EPIC_PROC_EOI_REG (EPIC_EUMBBAR + 0x200b0)/* End of interrupt */
/* Error code */
#define OK 0
#define ERROR -1
/* function prototypes */
void epicVendorId( unsigned int *step,
unsigned int *devId,
unsigned int *venId
);
void epicFeatures( unsigned int *noIRQs,
unsigned int *noCPUs,
unsigned int *VerId );
extern void epicInit( unsigned int IRQType, unsigned int clkRatio);
ULONG sysEUMBBARRead ( ULONG regNum );
void sysEUMBBARWrite ( ULONG regNum, ULONG regVal);
extern void epicTmFrequencySet( unsigned int frq );
extern unsigned int epicTmFrequencyGet(void);
extern unsigned int epicTmBaseSet( ULONG srcAddr,
unsigned int cnt,
unsigned int inhibit );
extern unsigned int epicTmBaseGet ( ULONG srcAddr, unsigned int *val );
extern unsigned int epicTmCountGet( ULONG srcAddr, unsigned int *val );
extern unsigned int epicTmInhibit( unsigned int timer );
extern unsigned int epicTmEnable( ULONG srcAdr );
extern void CoreExtIntEnable(void); /* Enable 603e external interrupts */
extern void CoreExtIntDisable(void); /* Disable 603e external interrupts */
extern unsigned char epicIntTaskGet(void);
extern void epicIntTaskSet( unsigned char val );
extern unsigned int epicIntAck(void);
extern void epicSprSet( unsigned int eumbbar, unsigned char );
extern void epicConfigGet( unsigned int *clkRatio,
unsigned int *serEnable );
extern void SrcVecTableInit(void);
extern unsigned int epicModeGet(void);
extern void epicIntEnable(int Vect);
extern void epicIntDisable(int Vect);
extern int epicIntSourceConfig(int Vect, int Polarity, int Sense, int Prio);
extern unsigned int epicIntAck(void);
extern void epicEOI(void);
extern int epicCurTaskPrioSet(int Vect);
struct SrcVecTable
{
ULONG srcAddr;
char srcName[40];
};
#endif /* EPIC_H */
doc/README.TQM8260 0 → 100644
View file @ e2211743
This file contains basic information on the port of U-Boot to TQM8260.
All the changes fit in the common U-Boot infrastructure, providing a
new TQM8260-specific entry in makefiles. To build U-Boot for TQM8260,
type "make TQM8260_config", edit the "include/config_TQM8260.h" file
if necessary, then type "make".
Common file modifications:
--------------------------
The following common files have been modified by this project:
(starting from the ppcboot-0.9.3/ directory)
MAKEALL - TQM8260 entry added
Makefile - TQM8260_config entry added
cpu/mpc8260/Makefile - soft_i2c.o module added
cpu/mpc8260/ether_scc.c - TQM8260-specific definitions added, an obvious
bug fixed (fcr -> scr)
cpu/mpc8260/ether_fcc.c - TQM8260-specific definitions added
include/flash.h - added definitions for the AM29LV640D Flash chip
New files:
----------
The following new files have been added by this project:
(starting from the ppcboot-0.9.3/ directory)
board/tqm8260/ - board-specific directory
board/tqm8260/Makefile - board-specific makefile
board/tqm8260/config.mk - config file
board/tqm8260/flash.c - flash driver (for AM29LV640D)
board/tqm8260/ppcboot.lds - linker script
board/tqm8260/tqm8260.c - ioport and memory initialization
cpu/mpc8260/soft_i2c.c - software i2c EEPROM driver
include/config_TQM8260.h - main configuration file
New configuration options:
--------------------------
CONFIG_TQM8260
Main board-specific option (should be defined for TQM8260).
CONFIG_82xx_CONS_SMC1
If defined, SMC1 will be used as the console
CONFIG_82xx_CONS_SMC2
If defined, SMC2 will be used as the console
CFG_INIT_LOCAL_SDRAM
If defined, the SDRAM on the local bus will be initialized and
mapped at BR2.
Acceptance criteria tests:
--------------------------
The following tests have been conducted to validate the port of U-Boot
to TQM8260:
1. Operation on serial console:
With the CONFIG_82xx_CONS_SMC1 option defined in the main configuration file,
the U-Boot output appeared on the serial terminal connected to COM1 as
follows:
------------------------------------------------------------------------------
=> help
go - start application at address 'addr'
run - run commands in an environment variable
bootm - boot application image from memory
bootp - boot image via network using BootP/TFTP protocol
tftpboot- boot image via network using TFTP protocol
and env variables ipaddr and serverip
rarpboot- boot image via network using RARP/TFTP protocol
bootd - boot default, i.e., run 'bootcmd'
loads - load S-Record file over serial line
loadb - load binary file over serial line (kermit mode)
md - memory display
mm - memory modify (auto-incrementing)
nm - memory modify (constant address)
mw - memory write (fill)
cp - memory copy
cmp - memory compare
crc32 - checksum calculation
base - print or set address offset
printenv- print environment variables
setenv - set environment variables
saveenv - save environment variables to persistent storage
protect - enable or disable FLASH write protection
erase - erase FLASH memory
flinfo - print FLASH memory information
bdinfo - print Board Info structure
iminfo - print header information for application image
coninfo - print console devices and informations
eeprom - EEPROM sub-system
loop - infinite loop on address range
mtest - simple RAM test
icache - enable or disable instruction cache
dcache - enable or disable data cache
reset - Perform RESET of the CPU
echo - echo args to console
version - print monitor version
help - print online help
? - alias for 'help'
=>
------------------------------------------------------------------------------
2. Flash driver operation
The following sequence was performed to test the "flinfo" command:
------------------------------------------------------------------------------
=> flinfo
Bank # 1: AMD 29LV640D (64 M, uniform sector)
Size: 32 MB in 128 Sectors
Sector Start Addresses:
40000000 40040000 (RO) 40080000 400C0000 40100000
40140000 40180000 401C0000 40200000 40240000
40280000 402C0000 40300000 40340000 40380000
403C0000 40400000 40440000 40480000 404C0000
40500000 40540000 40580000 405C0000 40600000
40640000 40680000 406C0000 40700000 40740000
40780000 407C0000 40800000 40840000 40880000
408C0000 40900000 40940000 40980000 409C0000
40A00000 40A40000 40A80000 40AC0000 40B00000
40B40000 40B80000 40BC0000 40C00000 40C40000
40C80000 40CC0000 40D00000 40D40000 40D80000
40DC0000 40E00000 40E40000 40E80000 40EC0000
40F00000 40F40000 40F80000 40FC0000 41000000
41040000 41080000 410C0000 41100000 41140000
41180000 411C0000 41200000 41240000 41280000
412C0000 41300000 41340000 41380000 413C0000
41400000 41440000 41480000 414C0000 41500000
41540000 41580000 415C0000 41600000 41640000
41680000 416C0000 41700000 41740000 41780000
417C0000 41800000 41840000 41880000 418C0000
41900000 41940000 41980000 419C0000 41A00000
41A40000 41A80000 41AC0000 41B00000 41B40000
41B80000 41BC0000 41C00000 41C40000 41C80000
41CC0000 41D00000 41D40000 41D80000 41DC0000
41E00000 41E40000 41E80000 41EC0000 41F00000
41F40000 41F80000 41FC0000
=>
------------------------------------------------------------------------------
The following sequence was performed to test the erase command:
------------------------------------------------------------------------------
=> cp 0 40080000 10
Copy to Flash... done
=> erase 40080000 400bffff
Erase Flash from 0x40080000 to 0x400bffff
.. done
Erased 1 sectors
=> md 40080000
40080000: ffffffff ffffffff ffffffff ffffffff ................
40080010: ffffffff ffffffff ffffffff ffffffff ................
40080020: ffffffff ffffffff ffffffff ffffffff ................
40080030: ffffffff ffffffff ffffffff ffffffff ................
40080040: ffffffff ffffffff ffffffff ffffffff ................
40080050: ffffffff ffffffff ffffffff ffffffff ................
40080060: ffffffff ffffffff ffffffff ffffffff ................
40080070: ffffffff ffffffff ffffffff ffffffff ................
40080080: ffffffff ffffffff ffffffff ffffffff ................
40080090: ffffffff ffffffff ffffffff ffffffff ................
400800a0: ffffffff ffffffff ffffffff ffffffff ................
400800b0: ffffffff ffffffff ffffffff ffffffff ................
400800c0: ffffffff ffffffff ffffffff ffffffff ................
400800d0: ffffffff ffffffff ffffffff ffffffff ................
400800e0: ffffffff ffffffff ffffffff ffffffff ................
400800f0: ffffffff ffffffff ffffffff ffffffff ................
=> cp 0 40080000 10
Copy to Flash... done
=> erase 1:2
Erase Flash Sectors 2-2 in Bank # 1
.. done
=> md 40080000
40080000: ffffffff ffffffff ffffffff ffffffff ................
40080010: ffffffff ffffffff ffffffff ffffffff ................
40080020: ffffffff ffffffff ffffffff ffffffff ................
40080030: ffffffff ffffffff ffffffff ffffffff ................
40080040: ffffffff ffffffff ffffffff ffffffff ................
40080050: ffffffff ffffffff ffffffff ffffffff ................
40080060: ffffffff ffffffff ffffffff ffffffff ................
40080070: ffffffff ffffffff ffffffff ffffffff ................
40080080: ffffffff ffffffff ffffffff ffffffff ................
40080090: ffffffff ffffffff ffffffff ffffffff ................
400800a0: ffffffff ffffffff ffffffff ffffffff ................
400800b0: ffffffff ffffffff ffffffff ffffffff ................
400800c0: ffffffff ffffffff ffffffff ffffffff ................
400800d0: ffffffff ffffffff ffffffff ffffffff ................
400800e0: ffffffff ffffffff ffffffff ffffffff ................
400800f0: ffffffff ffffffff ffffffff ffffffff ................
=> cp 0 40080000 10
Copy to Flash... done
=> cp 0 400c0000 10
Copy to Flash... done
=> erase 1:2-3
Erase Flash Sectors 2-3 in Bank # 1
... done
=> md 40080000
40080000: ffffffff ffffffff ffffffff ffffffff ................
40080010: ffffffff ffffffff ffffffff ffffffff ................
40080020: ffffffff ffffffff ffffffff ffffffff ................
40080030: ffffffff ffffffff ffffffff ffffffff ................
40080040: ffffffff ffffffff ffffffff ffffffff ................
40080050: ffffffff ffffffff ffffffff ffffffff ................
40080060: ffffffff ffffffff ffffffff ffffffff ................
40080070: ffffffff ffffffff ffffffff ffffffff ................
40080080: ffffffff ffffffff ffffffff ffffffff ................
40080090: ffffffff ffffffff ffffffff ffffffff ................
400800a0: ffffffff ffffffff ffffffff ffffffff ................
400800b0: ffffffff ffffffff ffffffff ffffffff ................
400800c0: ffffffff ffffffff ffffffff ffffffff ................
400800d0: ffffffff ffffffff ffffffff ffffffff ................
400800e0: ffffffff ffffffff ffffffff ffffffff ................
400800f0: ffffffff ffffffff ffffffff ffffffff ................
=> md 400c0000
400c0000: ffffffff ffffffff ffffffff ffffffff ................
400c0010: ffffffff ffffffff ffffffff ffffffff ................
400c0020: ffffffff ffffffff ffffffff ffffffff ................
400c0030: ffffffff ffffffff ffffffff ffffffff ................
400c0040: ffffffff ffffffff ffffffff ffffffff ................
400c0050: ffffffff ffffffff ffffffff ffffffff ................
400c0060: ffffffff ffffffff ffffffff ffffffff ................
400c0070: ffffffff ffffffff ffffffff ffffffff ................
400c0080: ffffffff ffffffff ffffffff ffffffff ................
400c0090: ffffffff ffffffff ffffffff ffffffff ................
400c00a0: ffffffff ffffffff ffffffff ffffffff ................
400c00b0: ffffffff ffffffff ffffffff ffffffff ................
400c00c0: ffffffff ffffffff ffffffff ffffffff ................
400c00d0: ffffffff ffffffff ffffffff ffffffff ................
400c00e0: ffffffff ffffffff ffffffff ffffffff ................
400c00f0: ffffffff ffffffff ffffffff ffffffff ................
=>
------------------------------------------------------------------------------
The following sequence was performed to test the Flash programming commands:
------------------------------------------------------------------------------
=> erase 40080000 400bffff
Erase Flash from 0x40080000 to 0x400bffff
.. done
Erased 1 sectors
=> cp 0 40080000 10
Copy to Flash... done
=> md 0
00000000: 00000000 00000104 61100200 01000000 ........a.......
00000010: 00000000 00000000 81140000 82000100 ................
00000020: 01080000 00004000 22800000 00000600 ......@.".......
00000030: 00200800 00000000 10000100 00008000 . ..............
00000040: 00812000 00000200 00020000 80000000 .. .............
00000050: 00028001 00001000 00040400 00000200 ................
00000060: 20480000 00000000 20090000 00142000 H...... ..... .
00000070: 00000000 00004000 24210000 10000000 ......@.$!......
00000080: 02440002 10000000 00200008 00000000 .D....... ......
00000090: 02440900 00000000 30a40000 00004400 .D......0.....D.
000000a0: 04420800 00000000 00000040 00020000 .B.........@....
000000b0: 05020000 00100000 00060000 00000000 ................
000000c0: 00400000 00000000 00080000 00040000 .@..............
000000d0: 10400000 00800004 00000000 00000200 .@..............
000000e0: 80890000 00010004 00080000 00000020 ...............
000000f0: 08000000 10000000 00010000 00000000 ................
=> md 40080000
40080000: 00000000 00000104 61100200 01000000 ........a.......
40080010: 00000000 00000000 81140000 82000100 ................
40080020: 01080000 00004000 22800000 00000600 ......@.".......
40080030: 00200800 00000000 10000100 00008000 . ..............
40080040: ffffffff ffffffff ffffffff ffffffff ................
40080050: ffffffff ffffffff ffffffff ffffffff ................
40080060: ffffffff ffffffff ffffffff ffffffff ................
40080070: ffffffff ffffffff ffffffff ffffffff ................
40080080: ffffffff ffffffff ffffffff ffffffff ................
40080090: ffffffff ffffffff ffffffff ffffffff ................
400800a0: ffffffff ffffffff ffffffff ffffffff ................
400800b0: ffffffff ffffffff ffffffff ffffffff ................
400800c0: ffffffff ffffffff ffffffff ffffffff ................
400800d0: ffffffff ffffffff ffffffff ffffffff ................
400800e0: ffffffff ffffffff ffffffff ffffffff ................
400800f0: ffffffff ffffffff ffffffff ffffffff ................
=>
------------------------------------------------------------------------------
The following sequence was performed to test storage of the environment
variables in Flash:
------------------------------------------------------------------------------
=> setenv foo bar
=> saveenv
Un-Protected 1 sectors
Erasing Flash...
.. done
Erased 1 sectors
Saving Environment to Flash...
Protected 1 sectors
=> reset
...
=> printenv
bootdelay=CONFIG_BOOTDELAY
baudrate=9600
ipaddr=192.168.4.7
serverip=192.168.4.1
ethaddr=66:55:44:33:22:11
foo=bar
stdin=serial
stdout=serial
stderr=serial
Environment size: 170/262140 bytes
=>
------------------------------------------------------------------------------
The following sequence was performed to test image download and run over
Ethernet interface (both interfaces were tested):
------------------------------------------------------------------------------
=> tftpboot 40000 hello_world.bin
ARP broadcast 1
TFTP from server 192.168.2.2; our IP address is 192.168.2.7
Filename 'hello_world.bin'.
Load address: 0x40000
Loading: #############
done
Bytes transferred = 65912 (10178 hex)
=> go 40004
## Starting application at 0x00040004 ...
Hello World
argc = 1
argv[0] = "40004"
argv[1] = "<NULL>"
Hit any key to exit ...
## Application terminated, rc = 0x0
=>
------------------------------------------------------------------------------
The following sequence was performed to test eeprom read/write commands:
------------------------------------------------------------------------------
=> md 40000
00040000: 00018148 9421ffe0 7c0802a6 bf61000c ...H.!..|....a..
00040010: 90010024 48000005 7fc802a6 801effe8 ...$H...........
00040020: 7fc0f214 7c7f1b78 813f004c 7c9c2378 ....|..x.?.L|.#x
00040030: 807e8000 7cbd2b78 80090010 3b600000 .~..|.+x....;`..
00040040: 7c0803a6 4e800021 813f004c 7f84e378 |...N..!.?.L...x
00040050: 807e8004 80090010 7c0803a6 4e800021 .~......|...N..!
00040060: 7c1be000 4181003c 80bd0000 813f004c |...A..<.....?.L
00040070: 3bbd0004 2c050000 40820008 80be8008 ;...,...@.......
00040080: 80090010 7f64db78 807e800c 3b7b0001 .....d.x.~..;{..
00040090: 7c0803a6 4e800021 7c1be000 4081ffcc |...N..!|...@...
000400a0: 813f004c 807e8010 80090010 7c0803a6 .?.L.~......|...
000400b0: 4e800021 813f004c 80090004 7c0803a6 N..!.?.L....|...
000400c0: 4e800021 2c030000 4182ffec 813f004c N..!,...A....?.L
000400d0: 80090000 7c0803a6 4e800021 813f004c ....|...N..!.?.L
000400e0: 807e8014 80090010 7c0803a6 4e800021 .~......|...N..!
000400f0: 38600000 80010024 7c0803a6 bb61000c 8`.....$|....a..
=> eeprom write 40000 0 40
EEPROM write: addr 00040000 off 0000 count 64 ... done
=> mw 50000 0 1000
=> eeprom read 50000 0 40
EEPROM read: addr 00050000 off 0000 count 64 ... done
=> md 50000
00050000: 00018148 9421ffe0 7c0802a6 bf61000c ...H.!..|....a..
00050010: 90010024 48000005 7fc802a6 801effe8 ...$H...........
00050020: 7fc0f214 7c7f1b78 813f004c 7c9c2378 ....|..x.?.L|.#x
00050030: 807e8000 7cbd2b78 80090010 3b600000 .~..|.+x....;`..
00050040: 00000000 00000000 00000000 00000000 ................
00050050: 00000000 00000000 00000000 00000000 ................
00050060: 00000000 00000000 00000000 00000000 ................
00050070: 00000000 00000000 00000000 00000000 ................
00050080: 00000000 00000000 00000000 00000000 ................
00050090: 00000000 00000000 00000000 00000000 ................
000500a0: 00000000 00000000 00000000 00000000 ................
000500b0: 00000000 00000000 00000000 00000000 ................
000500c0: 00000000 00000000 00000000 00000000 ................
000500d0: 00000000 00000000 00000000 00000000 ................
000500e0: 00000000 00000000 00000000 00000000 ................
000500f0: 00000000 00000000 00000000 00000000 ................
=>
------------------------------------------------------------------------------
Patch per Mon, 06 Aug 2001 17:57:27:
- upgraded Flash support (added support for the following chips:
AM29LV800T/B, AM29LV160T/B, AM29DL322T/B, AM29DL323T/B)
- BCR tweakage for the 8260 bus mode
- SIUMCR tweakage enabling the MI interrupt (IRQ7)
To simplify switching between the bus modes, a new configuration
option (CONFIG_BUSMODE_60x) has been added to the "config_TQM8260.h"
file. If it is defined, BCR will be configured for the 60x mode,
otherwise - for the 8260 mode.
Concerning the SIUMCR modification: it's hard to predict whether it
will induce any problems on the other (60x mode) board. However, the
problems (if they appear) should be easy to notice - if the board
does not boot, it's most likely caused by the DPPC configuration in
SIUMCR.
doc/README.bedbug 0 → 100644
View file @ e2211743
BEDBUG Support for U-Boot
--------------------------
These changes implement the bedbug (emBEDded deBUGger) debugger in U-Boot.
A specific implementation is made for the IBM405 processor but other flavors
can be easily implemented.
#####################
### Modifications ###
#####################
./common/Makefile
Included cmd_bedbug.c and bedbug.c in the Makefile.
./common/command.c
Added bedbug commands to command table.
./common/board.c
Added call to initialize debugger on startup.
./cpu/ppc4xx/Makefile
Added bedbug_405.c to the Makefile.
./cpu/ppc4xx/start.S
Added code to handle the debug exception (0x2000) on the 405.
Also added code to handle critical exceptions since the debug
is treated as critical on the 405.
./cpu/ppc4xx/traps.c
Added more detailed output for the program exception to tell
if it is an illegal instruction, privileged instruction or
a trap. Also added debug trap handler.
./include/cmd_confdefs.h
Added definition of CFG_CMD_BEDBUG.
./include/config_WALNUT405.h
Added CFG_CMD_BEDBUG to the CONFIG_COMMANDS for the WALNUT.
./include/ppc_asm.tmpl
Added code to handle critical exceptions
#################
### New Stuff ###
#################
./include/bedbug/ppc.h
./include/bedbug/regs.h
./include/bedbug/bedbug.h
./include/bedbug/elf.h [obsoleted by new include/elf.h]
./include/bedbug/tables.h
./include/cmd_bedbug.h
./common/cmd_bedbug.c
./common/bedbug.c
Bedbug library includes code for assembling and disassembling
PowerPC instructions to/from memory as well as handling
hardware breakpoints and stepping through code. These
routines are common to all PowerPC processors.
./cpu/ppc4xx/bedbug_405.c
IBM PPC405 specific debugger routines.
Bedbug support for the MPC860
-----------------------------
Changes:
common/cmd_bedbug.c
Added call to initialize 860 debugger.
cpu/mpc8xx/Makefile
Added new file "bedbug_860.c" to the makefile
cpu/mpc8xx/start.S
Added handler for InstructionBreakpoint (0xfd00)
cpu/mpc8xx/traps.c
Added new routine DebugException()
include/config_MBX.h
Added CFG_CMD_BEDBUG to CONFIG_COMMANDS define
New Files:
cpu/mpc8xx/bedbug_860.c
CPU-specific routines for 860 debug registers.
doc/README.evb64260 0 → 100644
View file @ e2211743
This file contains status information for the port of U-Boot to the
Galileo Evaluation Board.
Author: Josh Huber <huber@mclx.com>
Mission Critical Linux, Inc.
The support for the Galileo Evaluation board is fairly minimal now.
It's sufficient to boot Linux, but doesn't provide too much more than
what's required to do this.
Both DUART channels are supported (to use the second one, you have to
modify the board -- see the schematics for where to solder on the
devices module). The ethernet ports are supported, and the MPSC is
supported as a console driver. (keep in mind that the kernel has no
support for this yet)
There are still occaisonal lockups with the MPSC console driver due to
(we think!) overrun problems. If you're looking for something stable
to use for Linux development, consider sticking with the DUART console
for now.
Automatic memory sizing mostly works. We've had problems with some
combinations of memory. Please send us email if you're having trouble
with respect to the memory detection.
Right now, only the 512k boot flash is supported. Support for the
16MB flash on the devices module is forthcoming. Right now the flash
is stored at the 256k boundry in flash, wasting a whole sector (64k!)
for environment data. This isn't really a big deal since we're not
using the 512k for anything else. (Just U-Boot and the environment)
Finally, here is a sample output session:
U-Boot 1.0.0-pre1 (Jun 6 2001 - 12:45:11)
Initializing...
CPU: MPC7400 (altivec enabled) v2.9
Board: EVB64260
DRAM: 256 MB
FLASH: 512 kB
In: serial
Out: serial
Err: serial
=>
The default configuration should be correct for the evaluation board,
as it's shipped from Galileo. Keep in mind that the default baudrate
is set to 38400, 8N1.
Good luck, and make sure to send any bugreports to us (or the
u-boot-users list).
Josh
doc/README.mpc74xx 0 → 100644
View file @ e2211743
This file contains status information for the port of U-Boot to the
Motorola mpc74xx series of CPUs.
Author: Josh Huber <huber@mclx.com>
Mission Critical Linux, Inc.
Currently the support for these CPUs is pretty minimal, but enough to
get things going. (much like the support for the Galileo Eval Board)
There is a framework in place to enable the L2 cache, and to program
the BATs. Currently, there are still problems with the code which
sets up the L2 cache, so it's not enabled. (IMHO, it shouldn't be
anyway). Additionally, there is support for enabling the MMU, which
we also don't do. The BATs are programmed just for the benefit of
jumping into Linux in a sane configuration.
Most of the code was based on other cpus supported by U-Boot.
If you find any errors in the CPU setup code, please send us a note.
Thanks,
Josh
doc/README.usb 0 → 100644
View file @ e2211743
/*
* (C) Copyright 2001
* Denis Peter, MPL AG Switzerland
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
USB Support for PIP405 and MIP405 (UHCI)
========================================
The USB support is implemented on the base of the UHCI Host
controller.
Currently supported are USB Hubs, USB Keyboards and USB Floppys.
Tested with a TEAC Floppy TEAC FD-05PUB and Chicony KU-8933 Keyboard.
How it works:
-------------
The USB (at least the USB UHCI) needs a frame list (4k), transfer
descripor and queue headers which are all located in the main memory.
The UHCI allocates every milisecond the PCI bus and reads the current
frame pointer. This may cause to crash the OS during boot. So the USB
_MUST_ be stopped during OS boot. This is the reason, why the USB is
NOT automatically started during start-up. If someone needs the USB
he has to start it and should therefore be aware that he had to stop
it before booting the OS.
For USB keyboards this can be done by a script which is automatically
started after the U-Boot is up and running. To boot an OS with a an
USB keyboard another script is necessary, which first disables the
USB and then executes the boot command. If the boot command fails,
the script can reenable the USB kbd.
Common USB Commands:
- usb start:
- usb reset: (re)starts the USB. All USB devices will be
initialized and a device tree is build for them.
- usb tree: shows all USB devices in a tree like display
- usb info [dev]: shows all USB infos of the device dev, or of all
the devices
- usb stop [f]: stops the USB. If f==1 the USB will also stop if
an USB keyboard is assigned as stdin. The stdin
is then switched to serial input.
Storage USB Commands:
- usb scan: scans the USB for storage devices.The USB must be
running for this command (usb start)
- usb device [dev]: show or set current USB staorage device
- usb part [dev]: print partition table of one or all USB storage
devices
- usb read addr blk# cnt:
read `cnt' blocks starting at block `blk#'to
memory address `addr'
- usbboot addr dev:part:
boot from USB device
Config Switches:
----------------
CFG_CMD_USB enables basic USB support and the usb command
CONFIG_USB_UHCI defines the lowlevel part.A lowlevel part must be defined if
using CFG_CMD_USB
CONFIG_USB_KEYBOARD enables the USB Keyboard
CONFIG_USB_STORAGE enables the USB storage devices
include/asm-ppc/hymod.h 0 → 100644
View file @ e2211743
#ifndef _ASM_HYMOD_H_
#define _ASM_HYMOD_H_
#include <linux/config.h>
#ifdef CONFIG_8260
#include <asm/iopin_8260.h>
#endif
/*
* hymod configuration data - passed by boot code via the board information
* structure (only U-Boot has support for this at the moment)
*
* there are three types of data passed up from the boot monitor. the first
* (type hymod_eeprom_t) is the eeprom data that was read off both the main
* (or mother) board and the mezzanine board (if any). this data defines how
* many Xilinx fpgas are on each board, and their types (among other things).
* the second type of data (type xlx_mmap_t, one per Xilinx fpga) defines where
* in the physical address space the various Xilinx fpga access regions have
* been mapped by the boot rom. the third type of data (type xlx_iopins_t,
* one per Xilinx fpga) defines which io port pins are connected to the various
* signals required to program a Xilinx fpga.
*
* A ram/flash "bank" refers to memory controlled by the same chip select.
*
* the eeprom contents are defined as in technical note #2 - basically,
* a header, zero or more records in no particular order, and a 32 bit crc
* a record is 1 or more type bytes, a length byte and "length" bytes.
*/
#define HYMOD_EEPROM_ID 0xAA /* eeprom id byte */
#define HYMOD_EEPROM_VER 1 /* eeprom contents version */
#define HYMOD_EEPROM_SIZE 256 /* number of bytes in the eeprom */
/* eeprom header */
typedef
struct {
unsigned char id; /* eeprom id byte */
unsigned char ver; /* eeprom contents version number */
unsigned long len; /* total # of bytes btw hdr and crc */
}
hymod_eehdr_t;
/* maximum number of bytes available for eeprom data records */
#define HYMOD_EEPROM_MAXLEN (HYMOD_EEPROM_SIZE \
- sizeof (hymod_eehdr_t) \
- sizeof (unsigned long))
/* eeprom data record */
typedef
union {
struct {
unsigned char topbit:1;
unsigned char type:7;
unsigned char len;
unsigned char data[1]; /* variable length */
} small;
struct {
unsigned short topbit:1;
unsigned short nxtbit:1;
unsigned short type:14;
unsigned short len;
unsigned char data[1]; /* variable length */
} medium;
struct {
unsigned long topbit:1;
unsigned long nxtbit:1;
unsigned long type:30;
unsigned long len;
unsigned char data[1]; /* variable length */
} large;
}
hymod_eerec_t;
#define HYMOD_EEOFF_MAIN 0x00 /* i2c addr offset for main eeprom */
#define HYMOD_EEOFF_MEZZ 0x04 /* i2c addr offset for mezz eepomr */
/* eeprom record types */
#define HYMOD_EEREC_SERNO 1 /* serial number */
#define HYMOD_EEREC_DATE 2 /* date */
#define HYMOD_EEREC_BATCH 3 /* batch id */
#define HYMOD_EEREC_TYPE 4 /* board type */
#define HYMOD_EEREC_REV 5 /* revision number */
#define HYMOD_EEREC_SDRAM 6 /* sdram sizes */
#define HYMOD_EEREC_FLASH 7 /* flash sizes */
#define HYMOD_EEREC_ZBT 8 /* zbt ram sizes */
#define HYMOD_EEREC_XLXTYP 9 /* Xilinx fpga types */
#define HYMOD_EEREC_XLXSPD 10 /* Xilinx fpga speeds */
#define HYMOD_EEREC_XLXTMP 11 /* Xilinx fpga temperatures */
#define HYMOD_EEREC_XLXGRD 12 /* Xilinx fpga grades */
#define HYMOD_EEREC_CPUTYP 13 /* Motorola CPU type */
#define HYMOD_EEREC_CPUSPD 14 /* CPU speed */
#define HYMOD_EEREC_BUSSPD 15 /* bus speed */
#define HYMOD_EEREC_CPMSPD 16 /* CPM speed */
#define HYMOD_EEREC_HSTYPE 17 /* high-speed serial chip type */
#define HYMOD_EEREC_HSCHIN 18 /* high-speed serial input channels */
#define HYMOD_EEREC_HSCHOUT 19 /* high-speed serial output channels */
/* some dimensions */
#define HYMOD_MAX_BATCH 32 /* max no. of bytes in batch id */
#define HYMOD_MAX_SDRAM 4 /* max sdram "banks" on any board */
#define HYMOD_MAX_FLASH 4 /* max flash "banks" on any board */
#define HYMOD_MAX_ZBT 16 /* max ZBT rams on any board */
#define HYMOD_MAX_XLX 4 /* max Xilinx fpgas on any board */
#define HYMOD_MAX_BYTES 16 /* enough to store any bytes array */
/* board types */
#define HYMOD_BDTYPE_NONE 0 /* information not present */
#define HYMOD_BDTYPE_IO 1 /* I/O main board */
#define HYMOD_BDTYPE_CLP 2 /* CLP main board */
#define HYMOD_BDTYPE_DSP 3 /* DSP main board */
#define HYMOD_BDTYPE_INPUT 4 /* video input mezzanine board */
#define HYMOD_BDTYPE_ALTINPUT 5 /* video input mezzanine board */
#define HYMOD_BDTYPE_DISPLAY 6 /* video display mezzanine board */
#define HYMOD_BDTYPE_MAX 7 /* first invalid value */
/* Xilinx fpga types */
#define HYMOD_XTYP_NONE 0 /* information not present */
#define HYMOD_XTYP_XCV300E 1 /* Xilinx Virtex 300 */
#define HYMOD_XTYP_XCV400E 2 /* Xilinx Virtex 400 */
#define HYMOD_XTYP_XCV600E 3 /* Xilinx Virtex 600 */
#define HYMOD_XTYP_MAX 4 /* first invalid value */
/* Xilinx fpga speeds */
#define HYMOD_XSPD_NONE 0 /* information not present */
#define HYMOD_XSPD_SIX 1
#define HYMOD_XSPD_SEVEN 2
#define HYMOD_XSPD_EIGHT 3
#define HYMOD_XSPD_MAX 4 /* first invalid value */
/* Xilinx fpga temperatures */
#define HYMOD_XTMP_NONE 0 /* information not present */
#define HYMOD_XTMP_COM 1
#define HYMOD_XTMP_IND 2
#define HYMOD_XTMP_MAX 3 /* first invalid value */
/* Xilinx fpga grades */
#define HYMOD_XTMP_NONE 0 /* information not present */
#define HYMOD_XTMP_NORMAL 1
#define HYMOD_XTMP_ENGSAMP 2
#define HYMOD_XTMP_MAX 3 /* first invalid value */
/* CPU types */
#define HYMOD_CPUTYPE_NONE 0 /* information not present */
#define HYMOD_CPUTYPE_MPC8260 1 /* Motorola MPC8260 embedded powerpc */
#define HYMOD_CPUTYPE_MAX 2 /* first invalid value */
/* CPU/BUS/CPM clock speeds */
#define HYMOD_CLKSPD_NONE 0 /* information not present */
#define HYMOD_CLKSPD_33MHZ 1
#define HYMOD_CLKSPD_66MHZ 2
#define HYMOD_CLKSPD_100MHZ 3
#define HYMOD_CLKSPD_133MHZ 4
#define HYMOD_CLKSPD_166MHZ 5
#define HYMOD_CLKSPD_200MHZ 6
#define HYMOD_CLKSPD_MAX 7 /* first invalid value */
/* high speed serial chip types */
#define HYMOD_HSSTYPE_NONE 0 /* information not present */
#define HYMOD_HSSTYPE_AMCC52064 1
#define HYMOD_HSSTYPE_MAX 2 /* first invalid value */
/* a date (yyyy-mm-dd) */
typedef
struct {
unsigned short year;
unsigned char month;
unsigned char day;
}
hymod_date_t;
/* describes a Xilinx fpga */
typedef
struct {
unsigned char type; /* chip type */
unsigned char speed; /* chip speed rating */
unsigned char temp; /* chip temperature rating */
unsigned char grade; /* chip grade */
}
hymod_xlx_t;
/* describes a Motorola embedded processor */
typedef
struct {
unsigned char type; /* CPU type */
unsigned char cpuspd; /* speed of the PowerPC core */
unsigned char busspd; /* speed of the system and 60x bus */
unsigned char cpmspd; /* speed of the CPM co-processor */
}
hymod_mpc_t;
/* info about high-speed (1Gbit) serial interface */
typedef
struct {
unsigned char type; /* high-speed serial chip type */
unsigned char nchin; /* number of input channels mounted */
unsigned char nchout; /* number of output channels mounted */
}
hymod_hss_t;
/*
* this defines the contents of the serial eeprom that exists on every
* hymod board, including mezzanine boards (the serial eeprom will be
* faked for early development boards that don't have one)
*/
typedef
struct {
unsigned char ver; /* eeprom contents version */
unsigned char bdtype; /* board type */
unsigned char bdrev; /* board revision */
unsigned char batchlen; /* length of batch string below */
unsigned long serno; /* serial number */
hymod_date_t date; /* manufacture date */
unsigned char batch[32]; /* manufacturer specific batch id */
unsigned char nsdram; /* # of ram "banks" */
unsigned char nflash; /* # of flash "banks" */
unsigned char nzbt; /* # of ZBT rams */
unsigned char nxlx; /* # of Xilinx fpgas */
unsigned char sdramsz[HYMOD_MAX_SDRAM]; /* log2 of sdram size */
unsigned char flashsz[HYMOD_MAX_FLASH]; /* log2 of flash size */
unsigned char zbtsz[HYMOD_MAX_ZBT]; /* log2 of ZBT ram size */
hymod_xlx_t xlx[HYMOD_MAX_XLX]; /* Xilinx fpga info */
hymod_mpc_t mpc; /* Motorola MPC CPU info */
hymod_hss_t hss; /* high-speed serial info */
}
hymod_eeprom_t;
/*
* this defines a region in the processor's physical address space
*/
typedef
struct {
unsigned long exists:1; /* 1 if the region exists, 0 if not */
unsigned long size:31; /* size in bytes */
unsigned long base; /* base address */
}
xlx_prgn_t;
/*
* this defines where the various Xilinx fpga access regions are mapped
* into the physical address space of the processor
*/
typedef
struct {
xlx_prgn_t prog; /* program access region */
xlx_prgn_t reg; /* register access region */
xlx_prgn_t port; /* port access region */
}
xlx_mmap_t;
/*
* this defines which 8260 i/o port pins are connected to the various
* signals required for programming a Xilinx fpga
*/
typedef
struct {
iopin_t prog_pin; /* assert for >= 300ns to program */
iopin_t init_pin; /* goes high when fpga is cleared */
iopin_t done_pin; /* goes high when program is done */
iopin_t enable_pin; /* some fpgas need enabling */
}
xlx_iopins_t;
/* all info about one hymod board */
typedef
struct {
unsigned char eeprom_valid:1;
hymod_eeprom_t eeprom;
xlx_mmap_t mmap[HYMOD_MAX_XLX];
xlx_iopins_t iopins[HYMOD_MAX_XLX];
}
hymod_board_t;
/*
* this defines the configuration information of a hymod board-set
* (main board + possible mezzanine board). In future, there may be
* more than one mezzanine board (stackable?) - if so, add a "mezz2"
* field, and so on... or make mezz an array?
*/
typedef
struct {
hymod_board_t main; /* main board info */
hymod_board_t mezz; /* mezzanine board info */
unsigned long crc; /* ensures kernel and boot prom agree */
}
hymod_conf_t;
#endif /* _ASM_HYMOD_H_ */
include/cmd_kgdb.h 0 → 100644
View file @ e2211743
/*
* (C) Copyright 2000
* Murray Jensen <Murray.Jensen@cmst.csiro.au> and
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* KGDB support
*/
#ifndef _CMD_KGDB_H
#define _CMD_KGDB_H
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CMD_TBL_KGDB MK_CMD_TBL_ENTRY( \
"kgdb", 4, CFG_MAXARGS, 1, do_kgdb, \
"kgdb - enter gdb remote debug mode\n", \
"[arg0 arg1 .. argN]\n" \
" - executes a breakpoint so that kgdb mode is\n" \
" entered via the exception handler. To return\n" \
" to the monitor, the remote gdb debugger must\n" \
" execute a \"continue\" or \"quit\" command.\n" \
"\n" \
" if a program is loaded by the remote gdb, any args\n" \
" passed to the kgdb command are given to the loaded\n" \
" program if it is executed (see the \"hello_world\"\n" \
" example program in the U-Boot examples directory)." \
),
int do_kgdb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
#else
#define CMD_TBL_KGDB
#endif
#endif /* _CMD_KGDB_H */
include/common.h 0 → 100644
View file @ e2211743
/*
* (C) Copyright 2000-2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __COMMON_H_
#define __COMMON_H_ 1
#undef _LINUX_CONFIG_H
#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
typedef unsigned char uchar;
typedef volatile unsigned long vu_long;
typedef volatile unsigned short vu_short;
typedef volatile unsigned char vu_char;
#include <config.h>
#include <linux/bitops.h>
#include <linux/types.h>
#include <linux/string.h>
#include <asm/ptrace.h>
#include <stdarg.h>
#if defined(CONFIG_PCI) && defined(CONFIG_440)
#include <pci.h>
#endif
#ifdef CONFIG_8xx
#include <asm/8xx_immap.h>
#elif defined(CONFIG_8260)
#include <asm/immap_8260.h>
#endif
#ifdef CONFIG_4xx
#include <ppc4xx.h>
#endif
#ifdef CONFIG_HYMOD
#include <asm/hymod.h>
#endif
#ifdef CONFIG_ARM
#define asmlinkage /* nothing */
#endif
#include <part.h>
#include <flash.h>
#include <image.h>
#ifdef DEBUG
#define debug(fmt,args...) printf (fmt ,##args)
#else
#define debug(fmt,args...)
#endif /* DEBUG */
typedef void (interrupt_handler_t)(void *);
#include <asm/u-boot.h> /* boot information for Linux kernel */
#include <asm/global_data.h> /* global data used for startup functions */
/* enable common handling for all TQM8xxL boards */
#if defined(CONFIG_TQM823L) || defined(CONFIG_TQM850L) || \
defined(CONFIG_TQM855L) || defined(CONFIG_TQM860L)
# ifndef CONFIG_TQM8xxL
# define CONFIG_TQM8xxL
# endif
#endif
/*
* Function Prototypes
*/
#if CONFIG_SERIAL_SOFTWARE_FIFO
void serial_buffered_init (void);
void serial_buffered_putc (const char);
void serial_buffered_puts (const char *);
int serial_buffered_getc (void);
int serial_buffered_tstc (void);
#endif /* CONFIG_SERIAL_SOFTWARE_FIFO */
void hang (void) __attribute__ ((noreturn));
/* */
long int initdram (int);
int display_options (void);
void print_size (ulong, const char *);
/* common/main.c */
void main_loop (void);
int run_command (const char *cmd, int flag);
int readline (const char *const prompt);
void reset_cmd_timeout(void);
/* common/board.c */
void board_init_f (ulong);
void board_init_r (gd_t *, ulong);
int checkboard (void);
int checkflash (void);
int checkdram (void);
char * strmhz(char *buf, long hz);
int last_stage_init(void);
/* common/flash.c */
void flash_perror (int);
/* common/cmd_bootm.c */
void print_image_hdr (image_header_t *hdr);
extern ulong load_addr; /* Default Load Address */
/* common/cmd_nvedit.c */
int env_init (void);
void env_relocate (void);
char *getenv (uchar *);
int getenv_r (uchar *name, uchar *buf, unsigned len);
int saveenv (void);
#ifdef CONFIG_PPC /* ARM version to be fixed! */
void inline setenv (char *, char *);
#endif /* CONFIG_PPC */
#ifdef CONFIG_ARM
# include <asm/u-boot-arm.h> /* ARM version to be fixed! */
#endif /* CONFIG_ARM */
void pci_init (void);
void pciinfo (int, int);
#if defined(CONFIG_PCI) && defined(CONFIG_440)
# if defined(CFG_PCI_PRE_INIT)
int pci_pre_init (struct pci_controller * );
# endif
# if defined(CFG_PCI_TARGET_INIT)
void pci_target_init (struct pci_controller *);
# endif
# if defined(CFG_PCI_MASTER_INIT)
void pci_master_init (struct pci_controller *);
# endif
int is_pci_host (struct pci_controller *);
#endif
int misc_init_f (void);
int misc_init_r (void);
/* $(BOARD)/$(BOARD).c */
void reset_phy (void);
/* $(BOARD)/eeprom.c */
void eeprom_init (void);
int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
#ifdef CONFIG_LWMON
extern uchar pic_read (uchar reg);
extern void pic_write (uchar reg, uchar val);
#endif
/*
* Set this up regardless of board
* type, to prevent errors.
*/
#if defined(CONFIG_SPI) || !defined(CFG_I2C_EEPROM_ADDR)
# define CFG_DEF_EEPROM_ADDR 0
#else
# define CFG_DEF_EEPROM_ADDR CFG_I2C_EEPROM_ADDR
#endif /* CONFIG_SPI || !defined(CFG_I2C_EEPROM_ADDR) */
#if defined(CONFIG_PCU_E) || defined(CONFIG_CCM)
extern void spi_init_f (void);
extern void spi_init_r (void);
extern ssize_t spi_read (uchar *, int, uchar *, int);
extern ssize_t spi_write (uchar *, int, uchar *, int);
#endif
#ifdef CONFIG_RPXCLASSIC
void rpxclassic_init (void);
#endif
#ifdef CONFIG_MBX
/* $(BOARD)/mbx8xx.c */
void mbx_init (void);
void board_serial_init (void);
void board_ether_init (void);
#endif
#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_MBX) || defined(CONFIG_IAD210)
void board_get_enetaddr (uchar *addr);
#endif
#ifdef CONFIG_HERMES
/* $(BOARD)/hermes.c */
void hermes_start_lxt980 (int speed);
#endif
#ifdef CONFIG_EVB64260
void evb64260_init(void);
void debug_led(int, int);
void display_mem_map(void);
void perform_soft_reset(void);
#endif
void load_sernum_ethaddr (void);
/* $(BOARD)/$(BOARD).c */
int board_pre_init (void);
int board_postclk_init (void); /* after clocks/timebase, before env/serial */
void board_poweroff (void);
#if defined(CFG_DRAM_TEST)
int testdram(void);
#endif /* CFG_DRAM_TEST */
/* $(CPU)/start.S */
#ifdef CONFIG_8xx
uint get_immr (uint);
#endif
uint get_pvr (void);
uint rd_ic_cst (void);
void wr_ic_cst (uint);
void wr_ic_adr (uint);
uint rd_dc_cst (void);
void wr_dc_cst (uint);
void wr_dc_adr (uint);
int icache_status (void);
void icache_enable (void);
void icache_disable(void);
int dcache_status (void);
void dcache_enable (void);
void dcache_disable(void);
void relocate_code (ulong, gd_t *, ulong);
ulong get_endaddr (void);
void trap_init (ulong);
#if defined (CONFIG_4xx) || \
defined (CONFIG_74xx_7xx) || \
defined (CONFIG_74x) || \
defined (CONFIG_75x) || \
defined (CONFIG_74xx)
unsigned char in8(unsigned int);
void out8(unsigned int, unsigned char);
unsigned short in16(unsigned int);
unsigned short in16r(unsigned int);
void out16(unsigned int, unsigned short value);
void out16r(unsigned int, unsigned short value);
unsigned long in32(unsigned int);
unsigned long in32r(unsigned int);
void out32(unsigned int, unsigned long value);
void out32r(unsigned int, unsigned long value);
void ppcDcbf(unsigned long value);
void ppcDcbi(unsigned long value);
void ppcSync(void);
#endif
/* $(CPU)/cpu.c */
int checkcpu (void);
int checkicache (void);
int checkdcache (void);
void upmconfig (unsigned int, unsigned int *, unsigned int);
ulong get_tbclk (void);
/* $(CPU)/serial.c */
int serial_init (void);
void serial_setbrg (void);
void serial_putc (const char);
void serial_puts (const char *);
void serial_addr (unsigned int);
int serial_getc (void);
int serial_tstc (void);
/* $(CPU)/speed.c */
int get_clocks (void);
#if defined(CONFIG_8260)
int prt_8260_clks (void);
#endif
#ifdef CONFIG_4xx
ulong get_OPB_freq (void);
ulong get_PCI_freq (void);
#endif
#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
ulong get_FCLK (void);
ulong get_HCLK (void);
ulong get_PCLK (void);
ulong get_UCLK (void);
#endif
ulong get_bus_freq (ulong);
#if defined(CONFIG_4xx) || defined(CONFIG_IOP480)
# if defined(CONFIG_440)
typedef PPC440_SYS_INFO sys_info_t;
# else
typedef PPC405_SYS_INFO sys_info_t;
# endif
void get_sys_info ( sys_info_t * );
#endif
/* $(CPU)/cpu_init.c */
#if defined(CONFIG_8xx) || defined(CONFIG_8260)
void cpu_init_f (volatile immap_t *immr);
#endif
#ifdef CONFIG_4xx
void cpu_init_f (void);
#endif
int cpu_init_r (void);
#if defined(CONFIG_8260)
int prt_8260_rsr (void);
#endif
/* $(CPU)/interrupts.c */
int interrupt_init (void);
void timer_interrupt (struct pt_regs *);
void external_interrupt (struct pt_regs *);
void irq_install_handler(int, interrupt_handler_t *, void *);
void irq_free_handler (int);
void reset_timer (void);
ulong get_timer (ulong base);
void set_timer (ulong t);
void enable_interrupts (void);
int disable_interrupts (void);
/* $(CPU)/.../commproc.c */
int dpram_init (void);
uint dpram_base(void);
uint dpram_base_align(uint align);
uint dpram_alloc(uint size);
uint dpram_alloc_align(uint size,uint align);
void post_word_store (ulong);
ulong post_word_load (void);
/* $(CPU)/.../<eth> */
void mii_init (void);
/* $(CPU)/.../lcd.c */
ulong lcd_setmem (ulong);
/* $(CPU)/.../vfd.c */
ulong vfd_setmem (ulong);
/* $(CPU)/.../video.c */
ulong video_setmem (ulong);
/* ppc/cache.c */
void flush_cache (unsigned long, unsigned long);
/* ppc/ticks.S */
unsigned long long get_ticks(void);
void wait_ticks (unsigned long);
/* ppc/time.c */
void udelay (unsigned long);
ulong usec2ticks (unsigned long usec);
ulong ticks2usec (unsigned long ticks);
int init_timebase (void);
/* ppc/vsprintf.c */
ulong simple_strtoul(const char *cp,char **endp,unsigned int base);
long simple_strtol(const char *cp,char **endp,unsigned int base);
void panic(const char *fmt, ...);
int sprintf(char * buf, const char *fmt, ...);
int vsprintf(char *buf, const char *fmt, va_list args);
/* ppc/crc32.c */
ulong crc32 (ulong, const unsigned char *, uint);
ulong crc32_no_comp (ulong, const unsigned char *, uint);
/* common/console.c */
extern void **syscall_tbl;
int console_init_f(void); /* Before relocation; uses the serial stuff */
int console_init_r(void); /* After relocation; uses the console stuff */
int console_assign (int file, char *devname); /* Assign the console */
int ctrlc (void);
int had_ctrlc (void); /* have we had a Control-C since last clear? */
void clear_ctrlc (void); /* clear the Control-C condition */
int disable_ctrlc (int); /* 1 to disable, 0 to enable Control-C detect */
/*
* STDIO based functions (can always be used)
*/
/* serial stuff */
void serial_printf (const char *fmt, ...);
/* stdin */
int getc(void);
int tstc(void);
/* stdout */
void putc(const char c);
void puts(const char *s);
void printf(const char *fmt, ...);
/* stderr */
#define eputc(c) fputc(stderr, c)
#define eputs(s) fputs(stderr, s)
#define eprintf(fmt,args...) fprintf(stderr,fmt ,##args)
/*
* FILE based functions (can only be used AFTER relocation!)
*/
#define stdin 0
#define stdout 1
#define stderr 2
#define MAX_FILES 3
void fprintf(int file, const char *fmt, ...);
void fputs(int file, const char *s);
void fputc(int file, const char c);
int ftstc(int file);
int fgetc(int file);
int pcmcia_init (void);
#ifdef CONFIG_SHOW_BOOT_PROGRESS
void show_boot_progress (int status);
#endif
#endif /* __COMMON_H_ */
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