- 10 Dec, 2020 1 commit
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Aleksandar Gerasimovski authored
The USB support is not by default enabled on all designs, so it does not make seance to have USB specific erratum's enabled on such a designs. On our internal Hitachi-Powergrids design not using the USB controller there is a crash when accessing those specific memory locations selected by the erratum flags. Signed-off-by:
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 24 Jan, 2020 1 commit
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Masahiro Yamada authored
These config entries are inside the menu block, which already depends on ARCH_LS1021A: menu "LS102xA architecture" depends on ARCH_LS1021A Signed-off-by:Masahiro Yamada <masahiroy@kernel.org> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 02 Jan, 2020 1 commit
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Pankaj Bansal authored
move the PCIE related config from arch Kconfig to PCI Kconfig. As the PCI_LAYERSCAPE driver is being used in platform other than fsl-layerscape platforms like ls102xa. Signed-off-by:
Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 08 Nov, 2019 1 commit
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Udit Agarwal authored
Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC to avoid conflict with UEFI secure boot. Signed-off-by:
Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 15 Mar, 2019 1 commit
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Alison Wang authored
Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by:
Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by:
Alison Wang <alison.wang@nxp.com> Reviewed-by:
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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- 30 Jul, 2018 1 commit
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Michal Simek authored
Another round of sorting Kconfig entries aplhabetically. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Acked-by:
Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by:
Joe Hershberger <joe.hershberger@ni.com>
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- 12 Dec, 2017 1 commit
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Tuomas Tynkkynen authored
And use 'imply' liberally. Signed-off-by:Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
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- 11 Sep, 2017 5 commits
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Ran Wang authored
Rx Compliance tests may fail intermittently at high jitter frequencies using default register values Program register USB_PHY_RX_OVRD_IN_HI in certain sequence to make the Rx compliance test pass. Signed-off-by:
Sriram Dash <sriram.dash@nxp.com> Signed-off-by:
Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by:
Suresh Gupta <suresh.bhagat@nxp.com> Signed-off-by:
Ran Wang <ran.wang_1@nxp.com> [YS: Reordered Kconfig options] Reviewed-by:
York Sun <york.sun@nxp.com>
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Ran Wang authored
Low Frequency Periodic Singaling (LFPS) Peak-to-Peak Differential Output Voltage Test Compliance fails using default transmitter settings Change config of transmitter signal swings by setting register PCSTXSWINGFULL to 0x47 to pass compliance tests. Signed-off-by:
Sriram Dash <sriram.dash@nxp.com> Signed-off-by:
Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by:
Suresh Gupta <suresh.gupta@nxp.com> Signed-off-by:
Ran Wang <ran.wang_1@nxp.com> [YS: Reordered Kconfig options] Reviewed-by:
York Sun <york.sun@nxp.com>
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Ran Wang authored
The default setting for USB High Speed Squelch Threshold results in a threshold close to or lower than 100mV. This leads to Receive Compliance test failure for a 100mV threshold. Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test. Signed-off-by:
Sriram Dash <sriram.dash@nxp.com> Signed-off-by:
Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by:
Suresh Gupta <suresh.gupta@nxp.com> Signed-off-by:
Ran Wang <ran.wang_1@nxp.com> [YS: Reordered Kconfig options] Reviewed-by:
York Sun <york.sun@nxp.com>
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Ran Wang authored
USB High Speed (HS) EYE Height Adjustment USB HS speed eye diagram fails with the default value at many corners, particularly at a high temperature Optimal eye at TXREFTUNE value to 0x9 is observed, change set the same value. Signed-off-by:
Sriram Dash <sriram.dash@nxp.com> Signed-off-by:
Suresh Gupta <suresh.gupta@nxp.com> Signed-off-by:
Ran Wang <ran.wang_1@nxp.com> [YS: Reordered Kconfig options] Reviewed-by:
York Sun <york.sun@nxp.com>
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Ashish Kumar authored
CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by:
Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by:
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by:
York Sun <york.sun@nxp.com>
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- 11 Aug, 2017 1 commit
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Simon Glass authored
This converts the following to Kconfig: CONFIG_CMD_PCI Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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- 11 Jul, 2017 1 commit
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Simon Glass authored
This converts the following to Kconfig: CONFIG_SCSI Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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- 18 Jan, 2017 1 commit
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Hou Zhiqiang authored
Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 05 Jan, 2017 5 commits
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York Sun authored
Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing usage in ls102xa and fsl-layerscape. Remove all powerpc macros in config header and board header files. Signed-off-by:York Sun <york.sun@nxp.com>
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York Sun authored
Use Kconfig to select errata workaround. Signed-off-by:York Sun <york.sun@nxp.com>
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York Sun authored
Create driver/ddr/fsl/Kconfig and move existing options. Clean up existing macros. Signed-off-by:
York Sun <york.sun@nxp.com> [trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s] Signed-off-by:
Tom Rini <trini@konsulko.com>
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York Sun authored
Use Kconfig option to set little- or big-endian access to secure boot and trust architecture. Signed-off-by:York Sun <york.sun@nxp.com>
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York Sun authored
Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC and ARM SoCs, move it to Kconfig under the driver. Signed-off-by:York Sun <york.sun@nxp.com>
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- 02 Dec, 2016 1 commit
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York Sun authored
Move from CONFIG_SYS_EXTRA_OPTIONS to Kconfig option. Signed-off-by:York Sun <york.sun@nxp.com>
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- 06 Oct, 2016 6 commits
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York Sun authored
Move DDR3, DDR4 and related config options to Kconfig and clean up existing uses. Signed-off-by:
York Sun <york.sun@nxp.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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York Sun authored
Move these options to Kconfig and clean up existing uses. Signed-off-by:
York Sun <york.sun@nxp.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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York Sun authored
Move this option to Kconfig and clean up existing uses. This option is also used by PowerPC SoCs. Signed-off-by:
York Sun <york.sun@nxp.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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York Sun authored
Move MAX_CPUS option to Kconfig and clean up existing uses for ARM. This option is used by Freescale Layerscape SoCs. Signed-off-by:
York Sun <york.sun@nxp.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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York Sun authored
Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures. Signed-off-by:
York Sun <york.sun@nxp.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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York Sun authored
Some config options should not have prompt. They are selected by choosing target. Signed-off-by:
York Sun <york.sun@nxp.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- 26 Sep, 2016 2 commits
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York Sun authored
Move this option to Kconfig and clean up existing uses. Signed-off-by:
York Sun <york.sun@nxp.com> CC: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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York Sun authored
Move this option to Kconfig and clean up existing uses. Signed-off-by:York Sun <york.sun@nxp.com> CC: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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