- 10 Dec, 2020 1 commit
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Priyanka Singh authored
Check for NULL return value from fdt_getprop() in fdt_fixup_remove_jr() Signed-off-by:
Priyanka Singh <priyanka.singh@nxp.com> [Fixed checkpatch errors/warnings] Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 23 Oct, 2020 1 commit
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Michael Walle authored
On all newer Layerscape SoCs, only the export-controlled ciphers of the crypto module are disabled on non-E parts. Thus it doesn't make sense to completely remove the node. Linux will figure out what is there and what is not. Just remove it for older SoCs, where the module is indeed completely disabled on non-E parts. Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Horia Geanta <horia.geanta@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 27 Jul, 2020 1 commit
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Michael Walle authored
Add a new variable secondary_boot_code_start, which holds a pointer to the start of the spin table code. This will help to relocate the code section. While at it, move the size variable from the end to the beginning so there is a common section for the variables. Remove any other symbols. Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 17 Jul, 2020 1 commit
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Masahiro Yamada authored
The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada ...
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- 19 May, 2020 1 commit
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Simon Glass authored
Move this header out of the common header. Signed-off-by:Simon Glass <sjg@chromium.org>
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- 18 May, 2020 1 commit
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Simon Glass authored
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by:Simon Glass <sjg@chromium.org>
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- 17 May, 2020 1 commit
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Michael Walle authored
Virtually all callers of this function do the rounding on their own. Some do it right, some don't. Instead of doing this in each caller, do the rounding in efi_add_memory_map(). Change the size parameter to bytes instead of pages and remove aligning and size calculation in all callers. There is no more need to make the original efi_add_memory_map() (which takes pages as size) available outside the module. Thus rename it to efi_add_memory_map_pg() and make it static to prevent further misuse outside the module. Signed-off-by:
Michael Walle <michael@walle.cc> Add missing comma in sunxi_display.c. Reviewed-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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- 28 Apr, 2020 1 commit
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Hou Zhiqiang authored
Move GIC redistributor tables initialization to CPU setup function. This patch introduces a GIC redistributor tables init function, and moves the function of reserving memory for GIC redistributor tables to soc.c and adds a argument for the memory size to reserve, BTW rename the function so that it is more readable. Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
Wasim Khan <wasim.khan@nxp.com> Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 20 Apr, 2020 1 commit
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Florinel Iordache authored
Add generic support for backplane kr modes currently available: 10gbase-kr, 40gbase-kr4. Remove platform generic fixups (armv8/layerscape and powerpc) for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by:
Florinel Iordache <florinel.iordache@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 24 Jan, 2020 1 commit
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Simon Glass authored
These three clock functions don't use driver model and should be migrated. In the meantime, create a new file to hold them. Signed-off-by:Simon Glass <sjg@chromium.org>
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- 17 Jan, 2020 1 commit
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Simon Glass authored
These three clock functions don't use driver model and should be migrated. In the meantime, create a new file to hold them. Signed-off-by:Simon Glass <sjg@chromium.org>
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- 26 Dec, 2019 1 commit
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Alex Marginean authored
Hardware comes out of reset with implicit values, but these are outside the accepted range for Layerscape gen 3 chassis spec used on LS1028A. Allocate different IDs and fix up Linux DT to use them. Signed-off-by:
Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 21 Oct, 2019 1 commit
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Yuantian Tang authored
ls1028a has 4 personalities: ls1028a, ls1027a, ls1017a and ls1018a. Both ls1027a and ls1017a personalities are lower functionality version which doesn't support the multimedia subsystems, like LCD, GPU. To disable multimedia feature on non-multimedia version, set the status property to disabled in dts nodes. Signed-off-by:
Tang Yuantian <andy.tang@nxp.com> Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 12 Sep, 2019 1 commit
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Hou Zhiqiang authored
The correct config entry is CONFIG_PCIE_LAYERSCAPE and this typo results in skipping the fixup of Linux PCIe DT nodes. Also enable the fixup when Layerscape Gen4 controller driver is enabled. Fixes: 4da0e52c (armv8: fsl-layerscape: fix config dependency for layerscape pci code) Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- 19 Jun, 2019 1 commit
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Alex Marginean authored
Fixes a link error on layerscape platform, linking fails with CONFIG_PCI set and CONFIG_PCI_LAYERSCAPE unset. Signed-off-by:
Alex Marginean <alexm.osslist@gmail.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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- 17 Jan, 2019 1 commit
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Hou Zhiqiang authored
On LS1043A rev1.0 there are 4 interrupt pins for INTx, and on rev1.1 there is only 1 for INTx, so the current fixup is inverse of the fact. Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 23 Sep, 2018 1 commit
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Stephen Warren authored
Use CONFIG_IS_ENABLED(EFI_LOADER) to avoid explicitly checking CONFIG_SPL too. This simplifies the conditional. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Alexander Graf <agraf@suse.de>
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- 09 May, 2018 1 commit
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Ruchika Gupta authored
JR3 was getting removed from device tree only if random number generation was successful. However, if SEC firmware is present, JR3 should be removed from device tree node irrespective of the random seed generation as SEC firmware reserves it for it's use. Not removing it in case of random number generation failure causes the kernel to crash. Random number generation was being called twice. This is not required. If SEC firmware is running, SIP call can be made to the SEC firmware to get the random number. This call itself would return failure if function is not supported. Duplicate calling of random number generation function has been removed. Signed-off-by:
Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 07 May, 2018 1 commit
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Tom Rini authored
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by:Tom Rini <trini@konsulko.com>
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- 05 Mar, 2018 1 commit
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Masahiro Yamada authored
Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by:
Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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- 10 Jan, 2018 1 commit
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Ahmed Mansour authored
This patch adds changes necessary to move functionality present in PowerPC folders with ARM architectures that have DPAA1 QBMan hardware - Create new board/freescale/common/fsl_portals.c to house shared device tree fixups for DPAA1 devices with ARM and PowerPC cores - Add new header file to top includes directory to allow files in both architectures to grab the function prototypes - Port inhibit_portals() from PowerPC to ARM. This function is used in setup to disable interrupts on all QMan and BMan portals. It is needed because the interrupts are enabled by default for all portals including unused/uninitialised portals. When the kernel attempts to go to deep sleep the unused portals prevent it from doing so Signed-off-by:
Ahmed Mansour <ahmed.mansour@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 13 Dec, 2017 2 commits
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Wenbin song authored
Using "cpu_pos_mask()" function to detect the real online cpus, and discard the needless cpu nodes on kernel dts. Signed-off-by:
Wenbin Song <wenbin.song@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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Wenbin song authored
Check LS1043A/LS2080a by device ID without using personality ID to determine revision number. This check applies to all various personalities of the same SoC family. Signed-off-by:
Wenbin Song <wenbin.song@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 11 Sep, 2017 1 commit
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Ran Wang authored
According current code base, CONFIG_LS1012A should be CONFIG_ARCH_LS1012A, or function fsl_fdt_disable(blob) will be wrongly called to disable all dwc3 USB nodes on LS1012A, which cause Linux USB function stop working at all. Signed-off-by:
Ran Wang <ran.wang_1@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 26 Aug, 2017 1 commit
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Ruchika Gupta authored
kASLR support in kernel requires a random number to be passed via chosen/kaslr-seed propert. sec_firmware generates this random seed which can then be passed in the device tree node. sec_firmware reserves JR3 for it's own usage. Node for JR3 is removed from device-tree. Signed-off-by:Ruchika Gupta <ruchika.gupta@nxp.com>
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- 01 Jun, 2017 1 commit
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Simon Glass authored
These two functions have an of_ prefix which conflicts with naming used in of_addr. Rename them: fdt_read_number fdt_support_bus_default_count_cells Signed-off-by:Simon Glass <sjg@chromium.org>
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- 17 Apr, 2017 1 commit
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Yangbo Lu authored
Current sysclk fixing would fix all clocks with 'fixed-clock' compatible. This patch is to fix sysclk by path to avoid any incorrect fixing. Signed-off-by:
Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 28 Mar, 2017 1 commit
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Yingxi Yu authored
USB requires 100MHz clock. On LS1012A, a dedicated 100MHz is provided instead of SYSCLK (125MHz). Skipping checking SYSCLK for FDT fixup. Signed-off-by:
Yingxi Yu <yingxi.yu@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 18 Jan, 2017 3 commits
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Hou Zhiqiang authored
Moved the config FSL_PPA_ARMV8_PSCI from fsl-layerscape's Kconfig to Kconfig under armv8 and renamed it to SEC_FIRMWARE_ARMV8_PSCI. Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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Wenbin Song authored
The default MSI node in kernel tree is for LS1043A rev1.0 silicon, if rev1.1 silicon used, need to fixup the MSI node to match it. Signed-off-by:
Wenbin Song <wenbin.song@nxp.com> Signed-off-by:
Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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Wenbin Song authored
The LS1043A rev1.1 silicon supports two types of GIC offset: 4K alignment and 64K alignment. The bit SCFG_GIC400_ALIGN[GIC_ADDR_BIT] is used to choose which offset will be used. The LS1043A rev1.0 silicon only supports the CIG offset with 4K alignment. If GIC_ADDR_BIT bit is set, 4K alignment is used, or else 64K alignment is used. 64K alignment is the default setting. Overriding the weak smp_kick_all_cpus, the new impletment is able to detect GIC offset. The default GIC offset in kernel device tree is using 4K alignment, it need to be fixed if 64K alignment is detected. Signed-off-by:
Wenbin Song <wenbin.song@nxp.com> Signed-off-by:
Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 15 Dec, 2016 1 commit
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macro.wave.z@gmail.com authored
NXP/Freescale uses macro CONFIG_ARMV8_PSCI to enable their private PSCI implementation in PPA firmware, but this macro naming too generic, so this patch replaces it with a specic one CONFIG_FSL_PPA_ARMV8_PSCI. And this macro CONFIG_ARMV8_PSCI will be used for a generic PSCI for ARMv8 which will be added in following patchs. Signed-off-by:
Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 17 Nov, 2016 1 commit
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Alexander Graf authored
The efi loader code has its own memory map, so it needs to be aware where the spin tables are located, to ensure that no code writes into those regions. Signed-off-by:Alexander Graf <agraf@suse.de>
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- 06 Oct, 2016 1 commit
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Sriram Dash authored
SYSCLK is used as a reference clock for USB. When the USB controller is used, SYSCLK must meet the additional requirement of 100 MHz. Signed-off-by:
Sriram Dash <sriram.dash@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 19 Jul, 2016 1 commit
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Hou Zhiqiang authored
If the PSCI and PPA is ready, skip the fixup for spin-table and waking secondary cores. Otherwise, change SMP method to spin-table, and the device node of PSCI will be removed. Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 17 May, 2016 1 commit
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Alex Porosanu authored
For Qoriq PPC&ARM v7 platforms, the crypto node is being fixup'ed in order to update the SEC internal version (aka SEC ERA). This patch adds the same functionality to the ARMv8 SoCs. Signed-off-by:
Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 21 Mar, 2016 1 commit
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Stuart Yoder authored
Remove stream ID partitioning support that has been made obsolete by upstream device tree bindings that specify how representing how PCI requester IDs are mapped to MSI specifiers and SMMU stream IDs. Signed-off-by:
Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 24 Feb, 2016 1 commit
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Qianyu Gong authored
Add fdt fixup to insert Fman firmware into the device tree. Signed-off-by:
Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 25 Jan, 2016 1 commit
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Prabhakar Kushwaha authored
SYSCLK frequency is dependent on on-board switch settings. It may vary as per requirement. boot-loader is aware of board switch configurations. So Fixup Linux device tree from boot-loader. Signed-off-by:
Prabhakar Kushwaha <prabhakar@freescale.com> CC: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by:
York Sun <york.sun@nxp.com>
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- 30 Nov, 2015 1 commit
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Prabhakar Kushwaha authored
LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by:
Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by:
Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by:
York Sun <yorksun@freescale.com>
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